[U-Boot] [PATCH 0/4] USB and cache related fixes

Tom Rini trini at ti.com
Fri Jun 15 00:13:51 CEST 2012


On 06/14/2012 03:02 PM, Marek Vasut wrote:
> Dear Tom Rini,
> 
>> Hey all,
>>
>> In commit b8adb12 the cache flushing behavior was changed for the EHCI
>> stack.  This change showed a few different problems on TI platforms (where
>> our cacheline size is 64 not 32).
> 
> Good thing, it made a bug surface ;-)
> 
>> First, the dcache_off call that
>> ehci-omap had been doing was now not happening soon enough to paper over
>> the cache issues.
> 
> Hm, is the dcache_off() call implemented properly so nothing is lost when you 
> shut off the cache btw?

As best I can tell, yes.  It will do a dcache_flush_all() and then set
the correct bits.

-- 
Tom


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