[U-Boot] [PATCH V2 3/7] am33xx: pin mux defintions for CPSW switch
Ilya Yanok
ilya.yanok at cogentembedded.com
Tue Jun 26 13:01:22 CEST 2012
From: Chandan Nath <chandan.nath at ti.com>
This patch adds pin mux settings for CPSW switch found on
TI AM335X based boards (MII and RGMII modes).
CC: Tom Rini <trini at ti.com>
Signed-off-by: Ilya Yanok <ilya.yanok at cogentembedded.com>
---
Changes from V1:
- rebased to u-boot-ti/next
arch/arm/include/asm/arch-am33xx/common_def.h | 2 ++
board/ti/am335x/mux.c | 47 +++++++++++++++++++++++++
2 files changed, 49 insertions(+)
diff --git a/arch/arm/include/asm/arch-am33xx/common_def.h b/arch/arm/include/asm/arch-am33xx/common_def.h
index aa3b554..5a7b0f3 100644
--- a/arch/arm/include/asm/arch-am33xx/common_def.h
+++ b/arch/arm/include/asm/arch-am33xx/common_def.h
@@ -19,5 +19,7 @@
extern void enable_uart0_pin_mux(void);
extern void enable_mmc0_pin_mux(void);
extern void enable_i2c0_pin_mux(void);
+extern void enable_mii1_pin_mux(void);
+extern void enable_rgmii1_pin_mux(void);
#endif/*__COMMON_DEF_H__ */
diff --git a/board/ti/am335x/mux.c b/board/ti/am335x/mux.c
index 9ccb436..327b2de 100644
--- a/board/ti/am335x/mux.c
+++ b/board/ti/am335x/mux.c
@@ -280,6 +280,43 @@ static struct module_pin_mux i2c0_pin_mux[] = {
{-1},
};
+static struct module_pin_mux rgmii1_pin_mux[] = {
+ {OFFSET(mii1_txen), MODE(2)}, /* RGMII1_TCTL */
+ {OFFSET(mii1_rxdv), MODE(2) | RXACTIVE}, /* RGMII1_RCTL */
+ {OFFSET(mii1_txd3), MODE(2)}, /* RGMII1_TD3 */
+ {OFFSET(mii1_txd2), MODE(2)}, /* RGMII1_TD2 */
+ {OFFSET(mii1_txd1), MODE(2)}, /* RGMII1_TD1 */
+ {OFFSET(mii1_txd0), MODE(2)}, /* RGMII1_TD0 */
+ {OFFSET(mii1_txclk), MODE(2)}, /* RGMII1_TCLK */
+ {OFFSET(mii1_rxclk), MODE(2) | RXACTIVE}, /* RGMII1_RCLK */
+ {OFFSET(mii1_rxd3), MODE(2) | RXACTIVE}, /* RGMII1_RD3 */
+ {OFFSET(mii1_rxd2), MODE(2) | RXACTIVE}, /* RGMII1_RD2 */
+ {OFFSET(mii1_rxd1), MODE(2) | RXACTIVE}, /* RGMII1_RD1 */
+ {OFFSET(mii1_rxd0), MODE(2) | RXACTIVE}, /* RGMII1_RD0 */
+ {OFFSET(mdio_data), MODE(0) | RXACTIVE | PULLUP_EN},/* MDIO_DATA */
+ {OFFSET(mdio_clk), MODE(0) | PULLUP_EN}, /* MDIO_CLK */
+ {-1},
+};
+
+static struct module_pin_mux mii1_pin_mux[] = {
+ {OFFSET(mii1_rxerr), MODE(0) | RXACTIVE}, /* MII1_RXERR */
+ {OFFSET(mii1_txen), MODE(0)}, /* MII1_TXEN */
+ {OFFSET(mii1_rxdv), MODE(0) | RXACTIVE}, /* MII1_RXDV */
+ {OFFSET(mii1_txd3), MODE(0)}, /* MII1_TXD3 */
+ {OFFSET(mii1_txd2), MODE(0)}, /* MII1_TXD2 */
+ {OFFSET(mii1_txd1), MODE(0)}, /* MII1_TXD1 */
+ {OFFSET(mii1_txd0), MODE(0)}, /* MII1_TXD0 */
+ {OFFSET(mii1_txclk), MODE(0) | RXACTIVE}, /* MII1_TXCLK */
+ {OFFSET(mii1_rxclk), MODE(0) | RXACTIVE}, /* MII1_RXCLK */
+ {OFFSET(mii1_rxd3), MODE(0) | RXACTIVE}, /* MII1_RXD3 */
+ {OFFSET(mii1_rxd2), MODE(0) | RXACTIVE}, /* MII1_RXD2 */
+ {OFFSET(mii1_rxd1), MODE(0) | RXACTIVE}, /* MII1_RXD1 */
+ {OFFSET(mii1_rxd0), MODE(0) | RXACTIVE}, /* MII1_RXD0 */
+ {OFFSET(mdio_data), MODE(0) | RXACTIVE | PULLUP_EN}, /* MDIO_DATA */
+ {OFFSET(mdio_clk), MODE(0) | PULLUP_EN}, /* MDIO_CLK */
+ {-1},
+};
+
/*
* Configure the pin mux for the module
*/
@@ -310,3 +347,13 @@ void enable_i2c0_pin_mux(void)
{
configure_module_pin_mux(i2c0_pin_mux);
}
+
+void enable_rgmii1_pin_mux(void)
+{
+ configure_module_pin_mux(rgmii1_pin_mux);
+}
+
+void enable_mii1_pin_mux(void)
+{
+ configure_module_pin_mux(mii1_pin_mux);
+}
--
1.7.9.5
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