[U-Boot] [PATCH 1/4] i.MX6: define CACHELINE_SIZE

Marek Vasut marex at denx.de
Sat Mar 3 00:25:38 CET 2012


> ---
>  arch/arm/include/asm/arch-mx6/imx-regs.h |    2 ++
>  1 files changed, 2 insertions(+), 0 deletions(-)
> 
> diff --git a/arch/arm/include/asm/arch-mx6/imx-regs.h
> b/arch/arm/include/asm/arch-mx6/imx-regs.h index 6a200bb..3e5c4c2 100644
> --- a/arch/arm/include/asm/arch-mx6/imx-regs.h
> +++ b/arch/arm/include/asm/arch-mx6/imx-regs.h
> @@ -19,6 +19,8 @@
>  #ifndef __ASM_ARCH_MX6_IMX_REGS_H__
>  #define __ASM_ARCH_MX6_IMX_REGS_H__
> 
> +#define CONFIG_SYS_CACHELINE_SIZE	32
> +
>  #define ROMCP_ARB_BASE_ADDR             0x00000000
>  #define ROMCP_ARB_END_ADDR              0x000FFFFF
>  #define CAAM_ARB_BASE_ADDR              0x00100000

Acked-by: Marek Vasut <marex at denx.de>


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