[U-Boot] [PATCH] integrator: remove fragile delay loop from PCI code

[Linus Walleij]

The reference implementation of the PCI initialization code almost
everywhere contain this fragile loop of "a few usecs", and its
use of volatile variables to delay a number of bus cycles is indeed
uncertain.

Reading the manual "Integrator/AP Users Guide", page 5-15 it is
clearly stated:

"Wait until 230ms after the end of the reset period before
accessing V360EPC internal registers. The V360EPC supports the
use of a serial configuration PROM and the software must wait for
the device to detect the absence of this PROM before accessing any
registers. The required delay is a function of the PCI Clock, but
at the lower frequency (25MHz) is 230ms".

So let's simply wait 230ms per the spec.

This solves the compilation error that looked like this:
pci.c: In function ‘pci_init_board’:
pci.c:286:18: warning: variable ‘j’ set but not used

Reported-by: Wolfgang Denk <wd at denx.de>
Signed-off-by: Linus Walleij <linus.walleij at linaro.org>
---
 board/armltd/integrator/pci.c |    7 ++-----
 1 files changed, 2 insertions(+), 5 deletions(-)

diff --git a/board/armltd/integrator/pci.c b/board/armltd/integrator/pci.c
index f040450..8ff88fe 100644
--- a/board/armltd/integrator/pci.c
+++ b/board/armltd/integrator/pci.c
@@ -283,17 +283,14 @@ struct pci_controller integrator_hose = {
 
 void pci_init_board(void)
 {
-	volatile int i, j;
 	struct pci_controller *hose = &integrator_hose;
 	u16 val;
 
 	/* setting this register will take the V3 out of reset */
 	__raw_writel(SC_PCI_PCIEN, SC_PCI);
 
-	/* wait a few usecs to settle the device and the PCI bus */
-
-	for (i = 0; i < 100; i++)
-		j = i + 1;
+	/* Wait for 230 ms (from spec) before accessing any V3 registers */
+	mdelay(230);
 
 	/* Now write the Base I/O Address Word to PHYS_PCI_V3_BASE + 0x6E */
 	v3_writew(V3_LB_IO_BASE, (PHYS_PCI_V3_BASE >> 16));
-- 
1.7.7.6