[U-Boot] [RFC] mx53loco: Add 1GHz support

Fabio Estevam festevam at gmail.com
Fri Mar 16 21:21:40 CET 2012


Add Dialog DA9053 PMIC support and bump the mx53 CPU frequency to 1GHz.

Signed-off-by: Fabio Estevam <fabio.estevam at freescale.com>
---
This depends on the previous "mx5: Add clock config interface" patch I have just submitted.

When doing a "clock" command I do see that the frequency has changed to 1GHz:

MX53LOCO U-Boot > clock                                                         
PLL1           1000 MHz                                                         
PLL2            400 MHz                                                         
PLL3            216 MHz                                                         
PLL4            595 MHz                                                         
                                                                                
AHB          133333 kHz                                                         
IPG           66666 kHz                                                         
IPG PERCLK    40000 kHz                                                         
DDR          400000 kHz 

Originally it was:

MX53LOCO U-Boot > clock                                                         
PLL1            800 MHz                                                         
PLL2            333 MHz                                                         
PLL3            216 MHz                                                         
PLL4            595 MHz                                                         
                                                                                
AHB          111000 kHz                                                         
IPG           55500 kHz                                                         
IPG PERCLK    33300 kHz  
 
However, when the board boots I still see:

CPU:   Freescale i.MX53 family rev2.1 at 800 MHz 

I think this is due to the fact that the clock_init is called inside
board_late_init, hence it will take effect after the CPU clock is printed
during boot.

I would be glad to receive some suggestion in order to get the 1GHz frequency
printed during the initial boot log.

Also, still needs to support the other variant of mx53qsb with the mc34708 PMIC.

 board/freescale/mx53loco/mx53loco.c |   78 +++++++++++++++++++++++++++++++++++
 drivers/misc/Makefile               |    1 +
 include/configs/mx53loco.h          |   14 ++++++
 3 files changed, 93 insertions(+), 0 deletions(-)

diff --git a/board/freescale/mx53loco/mx53loco.c b/board/freescale/mx53loco/mx53loco.c
index d736141..47bdf27 100644
--- a/board/freescale/mx53loco/mx53loco.c
+++ b/board/freescale/mx53loco/mx53loco.c
@@ -35,6 +35,8 @@
 #include <mmc.h>
 #include <fsl_esdhc.h>
 #include <asm/gpio.h>
+#include <pmic.h>
+#include <dialog_pmic.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -290,6 +292,70 @@ int board_mmc_init(bd_t *bis)
 }
 #endif
 
+static void setup_iomux_i2c(void)
+{
+	/* I2C1 SDA */
+	mxc_request_iomux(MX53_PIN_CSI0_D8,
+		IOMUX_CONFIG_ALT5 | IOMUX_CONFIG_SION);
+	mxc_iomux_set_input(MX53_I2C1_IPP_SDA_IN_SELECT_INPUT,
+		INPUT_CTL_PATH0);
+	mxc_iomux_set_pad(MX53_PIN_CSI0_D8,
+		PAD_CTL_SRE_FAST | PAD_CTL_DRV_HIGH |
+		PAD_CTL_100K_PU | PAD_CTL_PKE_ENABLE |
+		PAD_CTL_PUE_PULL |
+		PAD_CTL_ODE_OPENDRAIN_ENABLE);
+	/* I2C1 SCL */
+	mxc_request_iomux(MX53_PIN_CSI0_D9,
+		IOMUX_CONFIG_ALT5 | IOMUX_CONFIG_SION);
+	mxc_iomux_set_input(MX53_I2C1_IPP_SCL_IN_SELECT_INPUT,
+		INPUT_CTL_PATH0);
+	mxc_iomux_set_pad(MX53_PIN_CSI0_D9,
+		PAD_CTL_SRE_FAST | PAD_CTL_DRV_HIGH |
+		PAD_CTL_100K_PU | PAD_CTL_PKE_ENABLE |
+		PAD_CTL_PUE_PULL |
+		PAD_CTL_ODE_OPENDRAIN_ENABLE);
+}
+
+static void power_init(void)
+{
+	unsigned int val, ret;
+	struct pmic *p;
+
+	pmic_init();
+	p = get_pmic();
+
+	/* Set VDDA to 1.25V */
+	val = DA9052_BUCKCORE_BCOREEN | DA_BUCKCORE_VBCORE_1_250V;
+	ret = pmic_reg_write(p, DA9053_BUCKCORE_REG, val);
+	if (!ret)
+		return;
+
+	pmic_reg_read(p, DA9053_SUPPLY_REG, &val);
+	val |= DA9052_SUPPLY_VBCOREGO;
+	pmic_reg_write(p, DA9053_SUPPLY_REG, val);
+	/* Set Vcc peripheral to 1.35V */
+	pmic_reg_write(p, 0x2f, 0x62);
+	pmic_reg_write(p, 0x3c, 0x62);
+}
+
+static void clock_init(void)
+{
+	int ret;
+	u32 ref_clk = CONFIG_SYS_MX5_HCLK;
+	/*
+	 * After increasing voltage to 1.25V, we can switch
+	 * CPU clock to 1GHz and DDR to 400MHz safely
+	 */
+	ret = mxc_set_clock(ref_clk, 1000, MXC_ARM_CLK);
+	if (ret)
+		printf("CPU:   Switch CPU clock to 1GHZ failed\n");
+
+	ret = mxc_set_clock(ref_clk, 400, MXC_PERIPH_CLK);
+	ret |= mxc_set_clock(ref_clk, 400, MXC_DDR_CLK);
+	if (ret)
+		printf("CPU:   Switch DDR clock to 400MHz failed\n");
+}
+
 int board_early_init_f(void)
 {
 	setup_iomux_uart();
@@ -305,6 +371,18 @@ int board_init(void)
 	return 0;
 }
 
+#ifdef CONFIG_BOARD_LATE_INIT
+int board_late_init(void)
+{
+#ifdef CONFIG_I2C_MXC
+	setup_iomux_i2c();
+	power_init();
+	clock_init();
+#endif
+	return 0;
+}
+#endif
+
 int checkboard(void)
 {
 	puts("Board: MX53 LOCO\n");
diff --git a/drivers/misc/Makefile b/drivers/misc/Makefile
index a709707..6511713 100644
--- a/drivers/misc/Makefile
+++ b/drivers/misc/Makefile
@@ -39,6 +39,7 @@ COBJS-$(CONFIG_PMIC_FSL) += pmic_fsl.o
 COBJS-$(CONFIG_PMIC_I2C) += pmic_i2c.o
 COBJS-$(CONFIG_PMIC_SPI) += pmic_spi.o
 COBJS-$(CONFIG_PMIC_MAX8998) += pmic_max8998.o
+COBJS-$(CONFIG_DIALOG_PMIC) += pmic_dialog.o
 
 COBJS	:= $(COBJS-y)
 SRCS	:= $(COBJS:.o=.c)
diff --git a/include/configs/mx53loco.h b/include/configs/mx53loco.h
index 34a4edd..b58c999 100644
--- a/include/configs/mx53loco.h
+++ b/include/configs/mx53loco.h
@@ -42,6 +42,7 @@
 #define CONFIG_SYS_MALLOC_LEN		(CONFIG_ENV_SIZE + 2 * 1024 * 1024)
 
 #define CONFIG_BOARD_EARLY_INIT_F
+#define CONFIG_BOARD_LATE_INIT
 #define CONFIG_MXC_GPIO
 
 #define CONFIG_MXC_UART
@@ -85,6 +86,19 @@
 #define CONFIG_MXC_USB_PORTSC	(PORT_PTS_UTMI | PORT_PTS_PTW)
 #define CONFIG_MXC_USB_FLAGS	0
 
+/* I2C Configs */
+#define CONFIG_HARD_I2C
+#define CONFIG_I2C_MXC
+#define CONFIG_SYS_I2C_MX53_PORT1
+#define CONFIG_SYS_I2C_SPEED		100000
+#define CONFIG_SYS_I2C_SLAVE		0xfe
+
+/* PMIC Controller */
+#define CONFIG_PMIC
+#define CONFIG_PMIC_I2C
+#define CONFIG_DIALOG_PMIC
+#define CONFIG_SYS_DIALOG_PMIC_I2C_ADDR	0x48
+
 /* allow to overwrite serial and ethaddr */
 #define CONFIG_ENV_OVERWRITE
 #define CONFIG_CONS_INDEX		1
-- 
1.7.1



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