[U-Boot] [PATCH v4] mx6: Read silicon revision from register

[Stefano Babic]

On 16/03/2012 16:02, Fabio Estevam wrote:
> Instead of hardcoding the mx6 silicon revision, read it in run-time.
> 
> Also, besides the silicon version print the mx6 variant type: quad,dual/solo 
> or solo-lite.
> 
> Tested on a mx6qsabrelite, where it shows:
> 
> CPU:   Freescale i.MX6Q rev1.0 at 792 MHz  
> 
> Signed-off-by: Fabio Estevam <fabio.estevam at freescale.com>
> ---

Hi Fabio,

> Changes since v3:
> - Provide a complete struct for anatop registers
> Changes since v2:
> - Read both chip variant and chip silicon version from anatop
> - Create a struct for accessing the anatop registers
> Changes since v1:
> - Fix typo on Subject
>  arch/arm/cpu/armv7/imx-common/cpu.c      |   19 ++++-
>  arch/arm/cpu/armv7/mx6/soc.c             |    8 ++-
>  arch/arm/include/asm/arch-mx6/imx-regs.h |  142 ++++++++++++++++++++++++++++++
>  3 files changed, 166 insertions(+), 3 deletions(-)
> 
> diff --git a/arch/arm/cpu/armv7/imx-common/cpu.c b/arch/arm/cpu/armv7/imx-common/cpu.c
> index 1e30ae5..35724df 100644
> --- a/arch/arm/cpu/armv7/imx-common/cpu.c
> +++ b/arch/arm/cpu/armv7/imx-common/cpu.c
> @@ -63,13 +63,28 @@ static char *get_reset_cause(void)
>  }
>  
>  #if defined(CONFIG_DISPLAY_CPUINFO)
> +
> +static char *get_mx6_type(u32 mx6type)
> +{
> +	switch (mx6type) {
> +	case 0x63:
> +		return "Q";	/* Quad-core version of the mx6 */
> +	case 0x61:
> +		return "DS";	/* Dual/Solo version of the mx6 */
> +	case 0x60:
> +		return "SL";	/* Solo-Lite version of the mx6 */
> +	default:
> +		return "unknown";
> +	}
> +}
> +
>  int print_cpuinfo(void)
>  {
>  	u32 cpurev;
>  
>  	cpurev = get_cpu_rev();
> -	printf("CPU:   Freescale i.MX%x family rev%d.%d at %d MHz\n",
> -		(cpurev & 0xFF000) >> 12,
> +	printf("CPU:   Freescale i.MX6%s rev%d.%d at %d MHz\n",
> +		get_mx6_type((cpurev & 0xFF000) >> 12),

I admit I have not yet tested, but does this statement generate a
"unknown" on all MX5 boards ?

Stefano

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