[U-Boot] [PATCH V4] net: fec_mxc: allow use with cache enabled

Eric Nelson eric.nelson at boundarydevices.com
Mon Mar 26 05:00:42 CEST 2012

On 03/25/2012 04:57 PM, Marek Vasut wrote:
> Dear Eric Nelson,
>> 	ensure that transmit and receive buffers are cache-line aligned
>>          invalidate cache for each packet as received
>> 	update receive buffer descriptors one cache line at a time
>>          flush cache before transmitting
>> Original patch by Marek:
>> 	http://lists.denx.de/pipermail/u-boot/2012-February/117695.html
>> Signed-off-by: Eric Nelson<eric.nelson at boundarydevices.com>
>> ---
 >> <snip>
>> V4 updates from ML
>> 	http://lists.denx.de/pipermail/u-boot/2012-March#120139
>> 	remove tabs after #define/#if/#error
> Acked-by: Marek Vasut<marex at denx.de>
> Didn't I ack some previous version? Maybe I even added tested-by to some
> previous version ;-)
Thanks Marek,

I couldn't find an official ack of the whole thing, though most of the code
structure came from you and were acked in parts.

I'm just trying to push it into the end zone so we can get completely
cache-enabled on i.MX6.



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