[U-Boot] Default LAWBAR mapping at reset for mpc85xx?

[Joakim Tjernlund]

Still trying to wrap my head around the P2010 cpu and its boot sequence(NOR)
We can run the full u-boot it we use the BDI emulator but without emulator it
won't boot.
We have 64 MB NOR flash and have based out design on the P1020RDB and we boot from NOR.
Using the emulator but with minimal config we cannot get past the switch_as part in start.S
if we define a LAWBAR for our flash space in the emulator, u-boot will boot correctly.

We don't understand how the initial routing of addresses to CS0 work without an
LAWBAR mapping(all LAWBARS are invalid at reset). Is there some HW default at work
here we have yet to see?

Other observations
1) why not map initial stack to L2SRAM instead of cache? That would make early debugging
   much simpler as the memory would stay when stepping with gdb.

2) RDB has its CCSRBAR defined to 0xffe00000 which is not the default ccsrbar(0xff700000)
   this looks like a typo, and if it is, does u-boot work on RDB boards if changed
   to the default? I suspect RDB could end up in the same trap we are stuck in.

 Jocke