[U-Boot] [PATCH] spi: Tegra2: Seaboard: fix UART corruption during SPI transactions

[Tom Warren]

Simon,

On Fri, May 11, 2012 at 5:16 PM, Simon Glass <sjg at chromium.org> wrote:
> Hi Tom,
>
> On Fri, May 11, 2012 at 1:14 PM, jimmzhang <jimmzhang at nvidia.com> wrote:
>>
>> On Wed, 2012-05-09 at 10:34 -0700, Tom Warren wrote:
>> > Simon Glass's proposal to fix this on Seaboard was NAK'd, so I
>> > removed his NS16550 references and added a small delay before
>> > SPI/UART muxing. Tested on my Seaboard with large SPI reads/writes
>> > and saw no corruption (crc's matched) and no spurious comm chars.\
>
>
> I'm afraid this version does not work fully for me. The problem is I think
> that the UART gets zero bytes in it from when the SPI was active. This
> causes the next command to be ignored. So for example:
>
> Tegra2 (SeaBoard) # echo fred
> fred
> Tegra2 (SeaBoard) # echo edmund
> edmund
> Tegra2 (SeaBoard) # saveenv
> Saving Environment to SPI Flash...
> Erasing SPI flash...Writing to SPI flash...done
> Tegra2 (SeaBoard) # echo blackadder
>
> ^^^^ this command does nothing!
>
> Tegra2 (SeaBoard) # echo blackadder
> blackadder
> Tegra2 (SeaBoard) #
>
> This is the reason why my original patch cleaned out the UART before reading
> further characters. If that logic really in impossible to have in U-Boot
> then the only option is (after a SPI operation) to read UART output using
> tstc() and getc() until there is nothing more. Ick.
I saw the same thing, and debugged it down to a NUL in the input
buffer. Not sure how it gets there - some combo of GPIO toggle, pinmux
switch, etc.
I have a patch to fix it by dropping the NUL in common/main.c's input
processing switch(), but I haven't posted it because I don't think
it'll pass muster, being in common code and all.

I can do some more debugging later to see if moving/changing the
sequence of GPIO/pinmux toggling and the delays around can eliminate
the NUL, but it's a low priority. I may also post the main.c NUL drop
just so anyone with a Seaboard && SPI build can apply it to their
private build if they want and fix the problem.

As it stands, though, this patch does get SPI working on Seaboard,
which is the only T20 board with this (really) poor UART/SPI design,
so I'll add it to the next pull request to Albert.

Thanks,

Tom
>
> That said, this is an improvement, since it allows SPI to work. So I am
> going to ack it so we can hopefully get it in there.
>
> Acked-by: Simon Glass <sjg at chromium.org>
>
>
>>
>> >
>> > Signed-off-by: Tom Warren <twarren at nvidia.com>
>>
>> Tested-by: Jimmy Zhang <jimmzhang at nvidia.com>
>>
>>
>>
>>
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>
> Regards,
> Simon
>