[U-Boot] [PATCH 5/7] OMAP5: EMIF: Add support for DDR3 device

[Tom Rini]

On Tue, May 22, 2012 at 08:28:55PM +0530, R, Sricharan wrote:
> Hi Tom,
> >> In OMAP5432 EMIF controlller supports DDR3 device.
> >> This patch adds support for ddr3 device intialization and configuration.
> >> Initialization sequence is done as specified in JEDEC specs.
> >> This also adds support for ddr3 leveling.
> > [snip]
> >> @@ -975,8 +1070,12 @@ static void do_sdram_init(u32 base)
> >> ? ? ? ?* Changing the timing registers in EMIF can happen(going from one
> >> ? ? ? ?* OPP to another)
> >> ? ? ? ?*/
> >> - ? ? if (!in_sdram)
> >> - ? ? ? ? ? ? lpddr2_init(base, regs);
> >> + ? ? if (!in_sdram) {
> >> + ? ? ? ? ? ? if (omap_revision() != OMAP5432_ES1_0)
> >> + ? ? ? ? ? ? ? ? ? ? lpddr2_init(base, regs);
> >> + ? ? ? ? ? ? else
> >> + ? ? ? ? ? ? ? ? ? ? ddr3_init(base, regs);
> >> + ? ? }
> >
> > In omap4+ land do we have any other way of telling which family we're
> > on? ?I ask since I'm preparing to add DDR3 support to am33xx and I'd
> > like to switch it over to the common emif framework as well.
> >
>   I think the SDRAM_TYPE[31:29] EMIF_SDRAM_CONFIG
>  register should tell the connected device at reset.
>  I will cross confirm this on the board and tell.

OK.  I can't find the omap5430 TRM quickly but on the am335x one,
SDRAM_TYPE is 3 for DDR3, 2 for DDR2 and 1 for LPDDR1 and 0 for DDR1.

-- 
Tom