[U-Boot] [PATCH] ARM: OMAP4: Correct the lpddr2 io settings register value.

[R Sricharan]

To meet certain timing requirements on the lpddr2 cmd and data phy
interfaces ,lpddr iopads have to be configured as differential buffers
and a Vref has to be internally generated and provided to these buffers.

Correcting the above settings here.

Signed-off-by: R Sricharan <r.sricharan at ti.com>
---
Verified this on OMAP4 panda using mtest.

 arch/arm/include/asm/arch-omap4/omap.h |    2 +-
 1 files changed, 1 insertions(+), 1 deletions(-)

diff --git a/arch/arm/include/asm/arch-omap4/omap.h b/arch/arm/include/asm/arch-omap4/omap.h
index 47c5883..03bd923 100644
--- a/arch/arm/include/asm/arch-omap4/omap.h
+++ b/arch/arm/include/asm/arch-omap4/omap.h
@@ -112,7 +112,7 @@
 #define CONTROL_LPDDR2IO_SLEW_325PS_DRV8_GATE_KEEPER	0x9E9E9E9E
 #define CONTROL_LPDDR2IO_SLEW_315PS_DRV12_PULL_DOWN	0x7C7C7C7C
 #define LPDDR2IO_GR10_WD_MASK				(3 << 17)
-#define CONTROL_LPDDR2IO_3_VAL		0xA0888C00
+#define CONTROL_LPDDR2IO_3_VAL		0xA0888C0F
 
 /* CONTROL_EFUSE_2 */
 #define CONTROL_EFUSE_2_NMOS_PMOS_PTV_CODE_1		0x00ffc000
-- 
1.7.1