[U-Boot] [PATCH 4/4] spi: mxc_spi: Fix spi clock glitch durant reset
Fabio Estevam
festevam at gmail.com
Thu Nov 15 22:23:24 CET 2012
From: Fabio Estevam <fabio.estevam at freescale.com>
Measuring the spi clock line on a scope shows a 'glitch' during the reset of the
spi.
Fix this by toggling only the MXC_CSPICTRL_EN bit, so that the clock line becomes
always stable.
Signed-off-by: Fabio Estevam <fabio.estevam at freescale.com>
---
drivers/spi/mxc_spi.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/spi/mxc_spi.c b/drivers/spi/mxc_spi.c
index 4bed4f0..102fca5 100644
--- a/drivers/spi/mxc_spi.c
+++ b/drivers/spi/mxc_spi.c
@@ -140,8 +140,8 @@ static s32 spi_cfg_mxc(struct mxc_spi_slave *mxcs, unsigned int cs,
reg_ctrl = reg_read(®s->ctrl);
/* Reset spi */
- reg_write(®s->ctrl, 0);
- reg_write(®s->ctrl, (reg_ctrl | 0x1));
+ reg_write(®s->ctrl, (reg_ctrl & ~MXC_CSPICTRL_EN));
+ reg_write(®s->ctrl, (reg_ctrl | MXC_CSPICTRL_EN));
/*
* The following computation is taken directly from Freescale's code.
--
1.7.9.5
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