[U-Boot] [PATCH 4/6] [v2] powerpc/85xx: Add P5040 processor support
Kim Phillips
kim.phillips at freescale.com
Mon Oct 1 20:12:13 CEST 2012
On Mon, 1 Oct 2012 09:06:41 -0500
Timur Tabi <timur at freescale.com> wrote:
> Add support for the Freescale P5040 SOC, which is similar to the P5020.
> Features of the P5040 are:
>
> Four P5040 single-threaded e5500 cores built
> Up to 2.4 GHz with 64-bit ISA support
> Three levels of instruction: user, supervisor, hypervisor
> CoreNet platform cache (CPC)
> 2.0 MB configures as dual 1 MB blocks hierarchical interconnect fabric
> Two 64-bit DDR3/3L SDRAM memory controllers with ECC and interleaving
> support Up to 1600MT/s
> Memory pre-fetch engine
> DPAA incorporating acceleration for the following functions
> Packet parsing, classification, and distribution (FMAN)
> Queue management for scheduling, packet sequencing and
> congestion management (QMAN)
> Hardware buffer management for buffer allocation and
> de-allocation (BMAN)
> Cryptography acceleration (SEC 5.2) at up to 40 Gbps SerDes
> 20 lanes at up to 5 Gbps
> Supports SGMII, XAUI, PCIe rev1.1/2.0, SATA Ethernet interfaces
> Two 10 Gbps Ethernet MACs
> Ten 1 Gbps Ethernet MACs
> High-speed peripheral interfaces
> Two PCI Express 2.0/3.0 controllers
> Additional peripheral interfaces
> Two serial ATA (SATA 2.0) controllers
> Two high-speed USB 2.0 controllers with integrated PHY
> Enhanced secure digital host controller (SD/MMC/eMMC)
> Enhanced serial peripheral interface (eSPI)
> Two I2C controllers
> Four UARTs
> Integrated flash controller supporting NAND and NOR flash
> DMA
> Dual four channel
> Support for hardware virtualization and partitioning enforcement
> Extra privileged level for hypervisor support
> QorIQ Trust Architecture 1.1
> Secure boot, secure debug, tamper detection, volatile key storage
same comment as I made before - make this marketing text relevant to
u-boot, e.g., list what devices this patch supports.
> +struct liodn_id_table sec_liodn_tbl[] = {
> + SET_SEC_JR_LIODN_ENTRY(0, 129, 130),
> + SET_SEC_JR_LIODN_ENTRY(1, 131, 132),
> + SET_SEC_JR_LIODN_ENTRY(2, 133, 134),
> + SET_SEC_JR_LIODN_ENTRY(3, 135, 136),
> + SET_SEC_RTIC_LIODN_ENTRY(a, 154),
> + SET_SEC_RTIC_LIODN_ENTRY(b, 155),
> + SET_SEC_RTIC_LIODN_ENTRY(c, 156),
> + SET_SEC_RTIC_LIODN_ENTRY(d, 157),
> + SET_SEC_DECO_LIODN_ENTRY(0, 97, 98),
> + SET_SEC_DECO_LIODN_ENTRY(1, 99, 100),
> +};
NACK - the SEC in the p5040 has four DECOs, not two.
Kim
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