[U-Boot] [PATCH 2/3] mx25pdk: Add esdhc support

[Stefano Babic]

Am 11/10/2012 05:58, schrieb Fabio Estevam:
> From: Fabio Estevam <fabio.estevam at freescale.com>
> 
> mx25pdk has a SD/MMC slot connected to esdhc1.
> 
> Add support for it and allow the environment variables to be saved into SD/MMC.
> 
> Signed-off-by: Fabio Estevam <fabio.estevam at freescale.com>
> ---

Hi Fabio,

>  board/freescale/mx25pdk/mx25pdk.c |   51 +++++++++++++++++++++++++++++++++++++
>  include/configs/mx25pdk.h         |   16 +++++++++++-
>  2 files changed, 66 insertions(+), 1 deletion(-)
> 
> diff --git a/board/freescale/mx25pdk/mx25pdk.c b/board/freescale/mx25pdk/mx25pdk.c
> index 4a8352f..e850b3e 100644
> --- a/board/freescale/mx25pdk/mx25pdk.c
> +++ b/board/freescale/mx25pdk/mx25pdk.c
> @@ -19,12 +19,23 @@
>  
>  #include <common.h>
>  #include <asm/io.h>
> +#include <asm/gpio.h>
>  #include <asm/arch/imx-regs.h>
>  #include <asm/arch/imx25-pinmux.h>
>  #include <asm/arch/sys_proto.h>
> +#include <mmc.h>
> +#include <fsl_esdhc.h>
> +
> +#define CARD_DETECT		IMX_GPIO_NR(2, 1)
>  
>  DECLARE_GLOBAL_DATA_PTR;
>  
> +#ifdef CONFIG_FSL_ESDHC
> +struct fsl_esdhc_cfg esdhc_cfg[1] = {
> +	{IMX_MMC_SDHC1_BASE},
> +};
> +#endif
> +
>  int dram_init(void)
>  {
>  	/* dram_init must store complete ramsize in gd->ram_size */
> @@ -48,6 +59,46 @@ int board_init(void)
>  	return 0;
>  }
>  
> +#ifdef CONFIG_FSL_ESDHC
> +int board_mmc_getcd(struct mmc *mmc)
> +{
> +	struct iomuxc_mux_ctl *muxctl;
> +	struct iomuxc_pad_ctl *padctl;
> +	u32 gpio_mux_mode = MX25_PIN_MUX_MODE(5);
> +
> +	/*
> +	 * Set up the Card Detect pin.
> +	 *
> +	 * SD1_GPIO_CD: gpio2_1 is ALT 5 mode of pin A15
> +	 *
> +	 */
> +	muxctl = (struct iomuxc_mux_ctl *)IMX_IOPADMUX_BASE;
> +	padctl = (struct iomuxc_pad_ctl *)IMX_IOPADCTL_BASE;
> +
> +	writel(gpio_mux_mode, &muxctl->pad_a15);
> +	writel(0x0, &padctl->pad_a15);
> +
> +	gpio_direction_input(CARD_DETECT);
> +	return !gpio_get_value(CARD_DETECT);
> +}
> +
> +int board_mmc_init(bd_t *bis)
> +{
> +	struct iomuxc_mux_ctl *muxctl;
> +	u32 sdhc1_mux_mode = MX25_PIN_MUX_MODE(0) | MX25_PIN_MUX_SION;
> +
> +	muxctl = (struct iomuxc_mux_ctl *)IMX_IOPADMUX_BASE;
> +	writel(sdhc1_mux_mode, &muxctl->pad_sd1_cmd);
> +	writel(sdhc1_mux_mode, &muxctl->pad_sd1_clk);
> +	writel(sdhc1_mux_mode, &muxctl->pad_sd1_data0);
> +	writel(sdhc1_mux_mode, &muxctl->pad_sd1_data1);
> +	writel(sdhc1_mux_mode, &muxctl->pad_sd1_data2);
> +	writel(sdhc1_mux_mode, &muxctl->pad_sd1_data3);
> +

You need also to set up the SDHC clock. This comes after merging:

	http://patchwork.ozlabs.org/patch/188329/

Adding
	esdhc_cfg.sdhc_clk = mxc_get_clock(MXC_ESDHC1_CLK);

before calling fsl_esdhc_initialize() should be enough.

Best regards,
Stefano

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