[U-Boot] [PATCH V2 3/5] ARM: tegra: derive CONFIG_SPL_MAX_SIZE instead of hard-coding it
Allen Martin
amartin at nvidia.com
Sat Oct 20 07:53:02 CEST 2012
On Thu, Oct 18, 2012 at 04:25:57PM -0700, Stephen Warren wrote:
> From: Stephen Warren <swarren at nvidia.com>
>
> For Tegra, the SPL and main U-Boot are concatenated together to form a
> single memory image. Hence, the maximum SPL size is the different in
> TEXT_BASE for SPL and main U-Boot. Instead of manually calculating
> SPL_MAX_SIZE based on those two TEXT_BASE, which can lead to errors if
> one TEXT_BASE is changed without updating SPL_MAX_SIZE, simply perform
> the calculation automatically.
>
Acked-by: Allen Martin <amartin at nvidia.com>
> Signed-off-by: Stephen Warren <swarren at nvidia.com>
> ---
> v2: New patch.
> ---
> include/configs/tegra20-common.h | 3 ++-
> 1 files changed, 2 insertions(+), 1 deletions(-)
>
> diff --git a/include/configs/tegra20-common.h b/include/configs/tegra20-common.h
> index 70c5cfb..c0c93e5 100644
> --- a/include/configs/tegra20-common.h
> +++ b/include/configs/tegra20-common.h
> @@ -188,7 +188,8 @@
> #define CONFIG_SPL
> #define CONFIG_SPL_NAND_SIMPLE
> #define CONFIG_SPL_TEXT_BASE 0x00108000
> -#define CONFIG_SPL_MAX_SIZE 0x00004000
> +#define CONFIG_SPL_MAX_SIZE (CONFIG_SYS_TEXT_BASE - \
> + CONFIG_SPL_TEXT_BASE)
> #define CONFIG_SYS_SPL_MALLOC_START 0x00090000
> #define CONFIG_SYS_SPL_MALLOC_SIZE 0x00010000
> #define CONFIG_SPL_STACK 0x000ffffc
> --
> 1.7.0.4
>
--
nvpublic
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