[U-Boot] [PATCH v2 2/2] coldfire: Add support for amcore board

angelo angelo70 at gmail.com
Wed Oct 31 10:33:21 CET 2012


Add support for amcore board.

Signed-off-by: Angelo Dureghello <sysamfw at gmail.com>
Cc: Jason Jin <jason.jin at freescale.com>
---
Changes for v2:
- Add MAINTAINERS entry
- Add boards.cfg entry
---
  MAINTAINERS                        |    4 +
  board/sysam/amcore/Makefile        |   43 ++++
  board/sysam/amcore/amcore.c        |  174 ++++++++++++++
  board/sysam/amcore/config.mk       |   23 ++
  board/sysam/amcore/flash.c         |  462 
++++++++++++++++++++++++++++++++++++
  board/sysam/amcore/u-boot.lds      |  101 ++++++++
  boards.cfg                         |    1 +
  include/configs/amcore.h           |  193 +++++++++++++++
  include/flash.h                    |    1 +
  9 files changed, 1002 insertions(+), 0 deletions(-)

diff --git a/MAINTAINERS b/MAINTAINERS
index 2daee7d..5cb951f 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -1118,6 +1118,10 @@ Wolfgang Wegner <w.wegner at astro-kom.de>

         astro_mcf5373l  MCF5373L

+Angelo Dureghello <sysamfw at gmail.com>
+
+       amcore          mcf5307
+
  #########################################################################
  # AVR32 Systems:                                                       #
  #                                                                      #
diff --git a/arch/m68k/cpu/mcf530x/Makefile b/arch/m68k/cpu/mcf530x/Makefile
new file mode 100644
index 0000000..3c5a1c2
--- /dev/null
+++ b/arch/m68k/cpu/mcf530x/Makefile
@@ -0,0 +1,48 @@
+#
+# Copyright (c) 2011 Angelo Dureghello <sysamfw at gmail.com>
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+# CFLAGS += -DET_DEBUG
+
+LIB    = $(obj)lib$(CPU).o
+
+START  = start.o
+COBJS  = interrupts.o cpu.o speed.o cpu_init.o
+
+SRCS   := $(START:.o=.S) $(SOBJS:.o=.S) $(COBJS:.o=.c)
+OBJS   := $(addprefix $(obj),$(SOBJS) $(COBJS))
+START  := $(addprefix $(obj),$(START))
+
+all:   $(obj).depend $(START) $(LIB)
+
+$(LIB):        $(OBJS)
+       $(call cmd_link_o_target, $(OBJS))
+
+#########################################################################
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#########################################################################
diff --git a/board/sysam/amcore/Makefile b/board/sysam/amcore/Makefile
new file mode 100644
index 0000000..c585b19
--- /dev/null
+++ b/board/sysam/amcore/Makefile
@@ -0,0 +1,43 @@
+#
+# Copyright (c) 2011 Angelo Dureghello <sysamfw at gmail.com>
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB    = $(obj)lib$(BOARD).o
+
+COBJS  = $(BOARD).o flash.o
+
+SRCS   := $(SOBJS:.o=.S) $(COBJS:.o=.c)
+OBJS   := $(addprefix $(obj),$(COBJS))
+SOBJS  := $(addprefix $(obj),$(SOBJS))
+
+$(LIB):        $(obj).depend $(OBJS)
+       $(call cmd_link_o_target, $(OBJS))
+
+#########################################################################
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#########################################################################
diff --git a/board/sysam/amcore/amcore.c b/board/sysam/amcore/amcore.c
new file mode 100644
index 0000000..e65e7fc
--- /dev/null
+++ b/board/sysam/amcore/amcore.c
@@ -0,0 +1,174 @@
+/*
+ * Copyright (c) 2011 Angelo Dureghello <sysamfw at gmail.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <command.h>
+#include <malloc.h>
+#include <asm/immap.h>
+
+/*
+ * board can have a K0108 lcd connected on the parallel port,
+ * wired as below:
+ *
+ * fc cpu   P0  P1  P2  P3  P4  P5  P6  P7  P10 P11 P12 P13 P14
+ * lcd      D0  D1  D2  D3  D4  D5  D6  D7  CS1 CS2 RW  DI  E
+ *
+ * Starting up setting lines in high impedance
+ */
+int init_lcd (void)
+{
+       /* all pins set to parallel port except PP8 and PP9 */
+       mbar_writeShort(MCFSIM_PAR, 0x300);
+       /* all outputs except P8 and P9 */
+       mbar_writeShort(MCFSIM_PADDR, 0xfcff);
+       /* CSX and E all disabled, D(data), W(write) */
+       mbar_writeShort(MCFSIM_PADAT, 0x0c00);
+}
+
+int checkboard (void)
+{
+       puts ("Board: ");
+       puts ("AMCORE v.001(alpha)\n");
+
+       init_lcd();
+
+       return 0;
+}
+
+/* aprox delay, to use before any timer init */
+void fudelay (int usec)
+{
+       int i=0;
+
+       for (;i<10;++i)
+       {
+               __asm__ __volatile__ ("nop");
+       }
+}
+
+phys_size_t initdram (int board_type)
+{
+       icache_disable();
+
+       /*
+       SDRAM  MT48LC4M32B2 details
+
+       Memory block 0: 16 MB of SDRAM at address $00000000
+       Port size: 32-bit port
+
+       Memory block 0 wired as follows:
+       ColdFire Pin: A15 A14 A13 A12 A11 A10 A9 A17 A18 A19 A20      
A21 A22 A23
+       SDRAM Pin:    A0  A1  A2  A3  A4  A5  A6 A7  A8  A9  A10(CMD) 
A11 BA0 BA1
+
+       Ensure that there is a delay of at least 100 microseconds from 
processor
+       reset to the following code so that the SDRAM is ready for 
commands...
+
+       write to DACR0 base address:0x0000, CASL:03, command bit 20,
+       CBM is OK to 3 ***, 32 bit port, continuos page mode, rest to 0
+       */
+
+       fudelay(1000);
+
+       /**
+        * DCR
+        * 0x26 mean Refresh period at 64msec (x4096 rows)
+        * 0x8000,0x8100,0x8200 are all valid, faster is 0x8000 (7G, tRC 
is >=70ns)
+        */
+       mbar_writeShort(MCFSIM_DCR, 0x8226);
+
+       /**
+        * DACR0
+        * page mode on burst only (to be verified) 0x00
+        * CMD on A20 0x0300
+        */
+       mbar_writeLong(MCFSIM_DACR0, 0x00003304);
+       mbar_writeLong(MCFSIM_DMR0, 0x00ff0001);
+
+       // issue a PRECHARGE ALL
+       mbar_writeLong(MCFSIM_DACR0, 0x0000330c);
+       *((volatile unsigned long  *)(0x00000004)) = 0xbeaddeed;
+       mbar_writeLong(MCFSIM_DACR0, 0x0000b304);
+
+       fudelay(1000);
+
+       *((volatile unsigned long  *)(0x00000004)) = 0xbeaddeed;
+       mbar_writeLong(MCFSIM_DACR0, 0x0000b304);
+
+       fudelay(1000);
+
+       mbar_writeLong(MCFSIM_DACR0, 0x0000b344);
+       *((volatile unsigned long  *)(0x00000c00)) = 0xbeaddeed;
+
+       // Memory block 1 not in use (DMR1[V] = 0)
+       mbar_writeLong(MCFSIM_DMR1, 0x00040000);
+       mbar_writeLong(MCFSIM_DACR1, 0x00000000);
+
+       icache_enable();
+
+       return CONFIG_SYS_SDRAM_SIZE * 1024 * 1024;
+}
+
+int testdram (void)
+{
+       int i=0,x,rval=0;
+
+       icache_disable();
+
+       const unsigned long a=0xaaaaaaaa;
+       const unsigned long b=0x55555555;
+       const unsigned long c=0xffffffff;
+       volatile unsigned long *p = (volatile unsigned long *)0;
+       volatile unsigned long *q;
+
+       puts ("SRAM test:\n");
+
+       for (;i<16;++i)
+       {
+               printf ("testing MB %02d ...\n", i+1);
+
+               q=p=(volatile unsigned long*)(1024*1024*i);
+
+               for (x=0;x<65536;++x) {
+                       *p++=0;
+                       *p++=a;
+                       *p++=b;
+                       *p++=c;
+               }
+               for (x=0;x<65536;++x) {
+                       if (*q++!=0) goto error;
+                       if (*q++!=a) goto error;
+                       if (*q++!=b) goto error;
+                       if (*q++!=c) goto error;
+               }
+       }
+       puts ("test passed !\n");
+       goto exit;
+
+error:
+       puts ("test failed !\n");
+       rval=1;
+
+exit:
+       icache_enable();
+
+       return (rval);
+}
diff --git a/board/sysam/amcore/config.mk b/board/sysam/amcore/config.mk
new file mode 100644
index 0000000..cb45c2c
--- /dev/null
+++ b/board/sysam/amcore/config.mk
@@ -0,0 +1,23 @@
+#
+# Copyright (c) 2011 Angelo Dureghello <sysamfw at gmail.com>
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+CONFIG_SYS_TEXT_BASE = 0xffc00000
diff --git a/board/sysam/amcore/flash.c b/board/sysam/amcore/flash.c
new file mode 100644
index 0000000..d2390f1
--- /dev/null
+++ b/board/sysam/amcore/flash.c
@@ -0,0 +1,462 @@
+/*
+ * Copyright (c) 2011 Angelo Dureghello <sysamfw at gmail.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+
+#include <asm/immap.h>
+
+#ifndef CONFIG_SYS_FLASH_CFI
+typedef unsigned short FLASH_PORT_WIDTH;
+typedef volatile unsigned short FLASH_PORT_WIDTHV;
+
+#define FPW             FLASH_PORT_WIDTH
+#define FPWV            FLASH_PORT_WIDTHV
+
+#define FLASH_CYCLE1    0x5555
+#define FLASH_CYCLE2    0x2aaa
+
+#define SYNC           __asm__("nop")
+
+/*-----------------------------------------------------------------------
+ * Functions
+ */
+
+ulong flash_get_size(FPWV * addr, flash_info_t * info);
+int flash_get_offsets(ulong base, flash_info_t * info);
+int write_word(flash_info_t * info, FPWV * dest, u16 data);
+void inline spin_wheel(void);
+
+flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS];
+
+unsigned short swap (unsigned short value)
+{
+       return ((value << 8) | (value >> 8));
+}
+
+ulong flash_init(void)
+{
+       ulong size = 0;
+       ulong fbase = 0;
+
+       fbase = (ulong) CONFIG_SYS_FLASH_BASE;
+       flash_get_size((FPWV *) fbase, &flash_info[0]);
+       flash_get_offsets((ulong) fbase, &flash_info[0]);
+       fbase += flash_info[0].size;
+       size += flash_info[0].size;
+
+       return size;
+}
+
+int flash_get_offsets(ulong base, flash_info_t * info)
+{
+       int j, k;
+
+       if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_SST) {
+
+               info->start[0] = base;
+               for (k = 0, j = 0; j < CONFIG_SYS_SST_SECT; j++, k++) {
+                       info->start[k + 1] = info->start[k] + 
CONFIG_SYS_SST_SECTSZ;
+                       info->protect[k] = 0;
+               }
+       }
+
+       return ERR_OK;
+}
+
+void flash_print_info(flash_info_t * info)
+{
+       int i;
+
+       switch (info->flash_id & FLASH_VENDMASK) {
+       case FLASH_MAN_SST:
+               printf("SST ");
+               break;
+       default:
+               printf("Unknown Vendor ");
+               break;
+       }
+
+       switch (info->flash_id & FLASH_TYPEMASK) {
+       case FLASH_SST3201B:
+               printf("SST39VF3201B\n");
+               break;
+       default:
+               printf("Unknown Chip Type\n");
+               return;
+       }
+
+       if (info->size > 0x100000) {
+               int remainder;
+
+               printf("  Size: %ld", info->size >> 20);
+
+               remainder = (info->size % 0x100000);
+               if (remainder) {
+                       remainder >>= 10;
+                       remainder = (int)((float)
+                                         (((float)remainder / 
(float)1024) *
+                                          10000));
+                       printf(".%d ", remainder);
+               }
+
+               printf("MB in %d Sectors\n", info->sector_count);
+       } else
+               printf("  Size: %ld KB in %d Sectors\n",
+                      info->size >> 10, info->sector_count);
+
+       printf("  Sector Start Addresses:");
+       for (i = 0; i < info->sector_count; ++i) {
+               if ((i % 5) == 0)
+                       printf("\n   ");
+               printf(" %08lX%s",
+                      info->start[i], info->protect[i] ? " (RO)" : 
"     ");
+       }
+       printf("\n");
+}
+
+/*
+ * The following code cannot be run from FLASH!
+ */
+ulong flash_get_size(FPWV * addr, flash_info_t * info)
+{
+       u16 vend, flid;
+
+       /* amcore board has bus bytes swapped */
+
+       addr[FLASH_CYCLE1] = (FPWV) 0xAA00AA00; /* for Atmel, Intel 
ignores this */
+       addr[FLASH_CYCLE2] = (FPWV) 0x55005500; /* for Atmel, Intel 
ignores this */
+       addr[FLASH_CYCLE1] = (FPWV) 0x90009000; /* selects Manufacture */
+
+       vend=swap(addr[0]);
+
+       //printf ("vendor = %08X\n", vend);
+
+       switch (vend) {
+       case (u8) SST_MANUFACT:
+               info->flash_id = FLASH_MAN_SST;
+               flid = swap(addr[1]);
+               break;
+       default:
+               printf("Unknown Flash\n");
+               info->flash_id = FLASH_UNKNOWN;
+               info->sector_count = 0;
+               info->size = 0;
+
+               *addr = (FPW) 0xF000F000;
+               return (0);     /* no or unknown flash  */
+       }
+
+       //printf ("flash id = %08X\n", flid);
+
+       switch (flid) {
+       case (u16) SST_ID_xF3201B:
+               info->flash_id += FLASH_SST3201B;
+               break;
+       default:
+               info->flash_id = FLASH_UNKNOWN;
+               break;
+       }
+
+       info->sector_count = 0;
+       info->size = 0;
+       info->sector_count = CONFIG_SYS_SST_SECT;
+       info->size = CONFIG_SYS_SST_SECT * CONFIG_SYS_SST_SECTSZ;
+
+       /* reset ID mode */
+       *addr = (FPWV) 0xF000F000;
+
+       if (info->sector_count > CONFIG_SYS_MAX_FLASH_SECT) {
+               printf("** ERROR: sector count %d > max (%d) **\n",
+                      info->sector_count, CONFIG_SYS_MAX_FLASH_SECT);
+               info->sector_count = CONFIG_SYS_MAX_FLASH_SECT;
+       }
+
+       return (info->size);
+}
+
+int flash_erase(flash_info_t * info, int s_first, int s_last)
+{
+       FPWV *addr;
+       int flag, prot, sect, count;
+       ulong type, start, last;
+       int rcode = 0, flashtype = 0;
+
+       if ((s_first < 0) || (s_first > s_last)) {
+               if (info->flash_id == FLASH_UNKNOWN)
+                       printf("- missing\n");
+               else
+                       printf("- no sectors to erase\n");
+               return 1;
+       }
+
+       type = (info->flash_id & FLASH_VENDMASK);
+
+       switch (type) {
+       case FLASH_MAN_SST:
+               flashtype = 1;
+               break;
+       default:
+               type = (info->flash_id & FLASH_VENDMASK);
+               printf("Can't erase unknown flash type %08lx - aborted\n",
+                      info->flash_id);
+               return 1;
+       }
+
+       prot = 0;
+       for (sect = s_first; sect <= s_last; ++sect) {
+               if (info->protect[sect]) {
+                       prot++;
+               }
+       }
+
+       if (prot)
+               printf("- Warning: %d protected sectors will not be 
erased!\n",
+                      prot);
+       else
+               printf("\n");
+
+       flag = disable_interrupts();
+
+       start = get_timer(0);
+       last = start;
+
+       if ((s_last - s_first) == (CONFIG_SYS_SST_SECT - 1)) {
+               if (prot == 0) {
+                       addr = (FPWV *) info->start[0];
+
+                       addr[FLASH_CYCLE1] = 0xAA00;    /* unlock */
+                       addr[FLASH_CYCLE2] = 0x5500;    /* unlock */
+                       addr[FLASH_CYCLE1] = 0x8000;    /* erase mode */
+                       addr[FLASH_CYCLE1] = 0xAA00;    /* unlock */
+                       addr[FLASH_CYCLE2] = 0x5500;    /* unlock */
+                       *addr = 0x3000; /* erase chip */
+
+                       count = 0;
+                       start = get_timer(0);
+
+                       while ((*addr & 0x8000) != 0x8000) {
+                               if (count++ > 0x10000) {
+                                       spin_wheel();
+                                       count = 0;
+                               }
+
+                               if (get_timer(start) > 
CONFIG_SYS_FLASH_ERASE_TOUT) {
+                                       printf("Timeout\n");
+                                       *addr = 0xF000; /* reset to read 
mode */
+
+                                       return 1;
+                               }
+                       }
+
+                       *addr = 0xF000; /* reset to read mode */
+
+                       printf("\b. done\n");
+
+                       if (flag)
+                               enable_interrupts();
+
+                       return 0;
+               } else if (prot == CONFIG_SYS_SST_SECT) {
+                       return 1;
+               }
+       }
+
+       /* Start erase on unprotected sectors */
+       for (sect = s_first; sect <= s_last; sect++) {
+               if (info->protect[sect] == 0) { /* not protected */
+
+                       addr = (FPWV *) (info->start[sect]);
+
+                       printf(".");
+
+                       /* arm simple, non interrupt dependent timer */
+                       start = get_timer(0);
+
+                       switch (flashtype) {
+                       case 1:
+                               {
+                                       FPWV *base;     /* first address 
in bank */
+
+                                       flag = disable_interrupts();
+
+                                       base = (FPWV *) 
(CONFIG_SYS_FLASH_BASE);        /* First sector */
+
+                                       base[FLASH_CYCLE1] = 0xAA00;    
/* unlock */
+                                       base[FLASH_CYCLE2] = 0x5500;    
/* unlock */
+                                       base[FLASH_CYCLE1] = 0x8000;    
/* erase mode */
+                                       base[FLASH_CYCLE1] = 0xAA00;    
/* unlock */
+                                       base[FLASH_CYCLE2] = 0x5500;    
/* unlock */
+                                       *addr = 0x5000; /* erase sector */
+
+                                       if (flag)
+                                               enable_interrupts();
+
+                                       while ((*addr & 0x8000) != 0x8000) {
+                                               if (get_timer(start) >
+                                                   
CONFIG_SYS_FLASH_ERASE_TOUT) {
+                                                       printf("Timeout\n");
+                                                       *addr = 0xF000; 
/* reset to read mode */
+
+                                                       rcode = 1;
+                                                       break;
+                                               }
+                                       }
+
+                                       *addr = 0xF000; /* reset to read 
mode */
+                                       break;
+                               }
+                       }       /* switch (flashtype) */
+               }
+       }
+       printf(" done\n");
+
+       if (flag)
+               enable_interrupts();
+
+       return rcode;
+}
+
+int write_buff(flash_info_t * info, uchar * src, ulong addr, ulong cnt)
+{
+       ulong wp, count;
+       u16 data;
+       int rc, port_width;
+
+       if (info->flash_id == FLASH_UNKNOWN)
+               return 4;
+
+       /* get lower word aligned address */
+       wp = addr;
+       port_width = sizeof(FPW);
+
+       /* handle unaligned start bytes */
+       if (wp & 1) {
+               data = *((FPWV *) wp);
+               data = (data << 8) | *src;
+
+               if ((rc = write_word(info, (FPWV *) wp, data)) != 0)
+                       return (rc);
+
+               wp++;
+               cnt -= 1;
+               src++;
+       }
+
+       while (cnt >= 2) {
+               /*
+                * writing words here
+                */
+               count = 0;
+               data = *((FPWV *) src);
+
+               if ((rc = write_word(info, (FPWV *) wp, data)) != 0)
+                       return (rc);
+
+               wp += 2;
+               src += 2;
+               cnt -= 2;
+
+               if (count++ > 0x800) {
+                       spin_wheel();
+                       count = 0;
+               }
+       }
+       /* handle last byte, if exist */
+       if (cnt) {
+               count = 0;
+               data = *((FPWV *) wp);
+
+               data = (data & 0x00ff) | (*src << 8);
+
+               if ((rc = write_word(info, (FPWV *) wp, data)) != 0)
+                       return (rc);
+               cnt--;
+       }
+
+       if (cnt == 0)
+               return ERR_OK;
+
+       return ERR_OK;
+}
+
+/*-----------------------------------------------------------------------
+ * Write a word to Flash
+ * Function ready for 16 bit PS flash chips
+ *
+ * returns:
+ * 0 - OK
+ * 1 - write timeout
+ * 2 - Flash not erased
+ */
+int write_word(flash_info_t * info, FPWV * dest, u16 data)
+{
+       ulong start;
+       int flag;
+       int res = 0;            /* result, assume success */
+       FPWV *base;             /* first address in flash bank */
+
+       /* Check if Flash is (sufficiently) erased */
+       if ((*dest & data) != data) {
+               return (2);
+       }
+
+       base = (FPWV *) (CONFIG_SYS_FLASH_BASE);
+
+       /* Disable interrupts which might cause a timeout here */
+       flag = disable_interrupts();
+
+       base[FLASH_CYCLE1] = 0xAA00;    /* unlock */
+       base[FLASH_CYCLE2] = 0x5500;    /* unlock */
+       base[FLASH_CYCLE1] = 0xA000;    /* selects program mode */
+
+       *dest = data;           /* start programming the data */
+
+       /* re-enable interrupts if necessary */
+       if (flag)
+               enable_interrupts();
+
+       start = get_timer(0);
+
+       /* data polling for D7 */
+       while (res == 0
+ && (*dest & 0x8000) != (data & 0x8000)) {
+               if (get_timer(start) > CONFIG_SYS_FLASH_WRITE_TOUT) {
+                       *dest = 0xF000; /* reset bank */
+                       res = 1;
+               }
+       }
+
+       *dest++ = 0xF000;       /* reset bank */
+
+       return (res);
+}
+
+void inline spin_wheel(void)
+{
+       static int p = 0;
+       static char w[] = "\\/-";
+
+       printf("\010%c", w[p]);
+       (++p == 3) ? (p = 0) : 0;
+}
+
+#endif
diff --git a/board/sysam/amcore/u-boot.lds b/board/sysam/amcore/u-boot.lds
new file mode 100644
index 0000000..ccb770d
--- /dev/null
+++ b/board/sysam/amcore/u-boot.lds
@@ -0,0 +1,101 @@
+/*
+ * Copyright (c) 2011 Angelo Dureghello <sysamfw at gmail.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+OUTPUT_ARCH(m68k)
+
+SECTIONS
+{
+  /* Read-only sections, merged into text segment: */
+  .text      :
+  {
+    arch/m68k/cpu/mcf530x/start.o              (.text)
+
+    . = DEFINED(env_offset) ? env_offset : .;
+    common/env_embedded.o      (.text)
+
+    *(.text)
+  }
+  _etext = .;
+  PROVIDE (etext = .);
+  .rodata    :
+  {
+    *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*)))
+  }
+
+  /* Read-write section, merged into data segment: */
+  . = (. + 0x00FF) & 0xFFFFFF00;
+  _erotext = .;
+  PROVIDE (erotext = .);
+
+  .reloc   :
+  {
+    __got_start = .;
+    KEEP(*(.got))
+    __got_end = .;
+    _GOT2_TABLE_ = .;
+    KEEP(*(.got2))
+    _FIXUP_TABLE_ = .;
+    KEEP(*(.fixup))
+  }
+  __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
+  __fixup_entries = (. - _FIXUP_TABLE_)>>2;
+
+  .data    :
+  {
+    *(.data)
+    *(.sdata)
+  }
+  _edata  =  .;
+  PROVIDE (edata = .);
+
+  . = .;
+
+  . = ALIGN(4);
+  .u_boot_list : {
+        #include <u-boot.lst>
+  }
+
+  . = .;
+  __start___ex_table = .;
+  __ex_table : { *(__ex_table) }
+  __stop___ex_table = .;
+
+  . = ALIGN(256);
+  __init_begin = .;
+  .text.init : { *(.text.init) }
+  .data.init : { *(.data.init) }
+  . = ALIGN(256);
+  __init_end = .;
+
+  __bss_start = .;
+  .bss (NOLOAD)       :
+  {
+   _sbss = .;
+   *(.sbss*)
+   *(.bss*)
+   *(COMMON)
+   . = ALIGN(4);
+   _ebss = .;
+  }
+  __bss_end__ = . ;
+  PROVIDE (end = .);
+}
diff --git a/boards.cfg b/boards.cfg
index 0ecd1b8..536d048 100644
--- a/boards.cfg
+++ b/boards.cfg
@@ -375,6 +375,7 @@ M5271EVB                     m68k        mcf52x2     
m5271evb            freesca
  M5272C3                      m68k        mcf52x2     
m5272c3             freescale
  M5275EVB                     m68k        mcf52x2     
m5275evb            freescale
  M5282EVB                     m68k        mcf52x2     
m5282evb            freescale
+amcore                       m68k        mcf530x     
amcore              sysam
  astro_mcf5373l               m68k        mcf532x     
mcf5373l            astro
  M53017EVB                    m68k        mcf532x     
m53017evb           freescale
  M5329AFEE                    m68k        mcf532x     
m5329evb            freescale      -           M5329EVB:NANDFLASH_SIZE=0
diff --git a/include/configs/amcore.h b/include/configs/amcore.h
new file mode 100644
index 0000000..c6b49e8
--- /dev/null
+++ b/include/configs/amcore.h
@@ -0,0 +1,193 @@
+/*
+ * Configuation settings for the Sysam AMCORE board.
+ *
+ * Copyright (c) 2011 Angelo Dureghello <sysamfw at gmail.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.         See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+/*
+ * board/config.h - configuration options, board specific
+ */
+
+#ifndef _AMCORE_H
+#define _AMCORE_H
+
+/*
+ * High Level Configuration Options
+ * (easy to change)
+ */
+#define CONFIG_MCF530x                 /* define processor family */
+#define CONFIG_M5307                   /* define processor type */
+
+#define CONFIG_MCFTMR
+
+#define CONFIG_MCFUART
+#define CONFIG_SYS_UART_PORT           (0)
+#define CONFIG_BAUDRATE                        115200
+#define CONFIG_SYS_BAUDRATE_TABLE      { 9600 , 19200 , 38400 , 57600, 
115200 }
+#define CONFIG_BOOTDELAY   1  /* autoboot after 5 seconds   */
+#define CONFIG_BOOTCOMMAND "bootm ffc20000" /* autoboot command   */
+
+
+
+#undef  CONFIG_WATCHDOG
+#undef  CONFIG_MONITOR_IS_IN_RAM
+
+/*
+ * BOOTP options
+ */
+#undef CONFIG_BOOTP_BOOTFILESIZE
+#undef CONFIG_BOOTP_BOOTPATH
+#undef CONFIG_BOOTP_GATEWAY
+#undef CONFIG_BOOTP_HOSTNAME
+
+/*
+ * Command line configuration.
+ */
+
+#include <config_cmd_default.h>
+#undef CONFIG_CMD_CACHE
+#undef CONFIG_CMD_NET
+#undef CONFIG_CMD_NFS
+#define CONFIG_CMD_MEMORY
+#define CONFIG_CMD_FLASH
+#define CONFIG_CMD_CACHE
+
+#define CONFIG_SYS_PROMPT              "amcore$ "
+//#define CONFIG_SYS_LONGHELP                          /* undef to save 
memory         */
+
+#if defined(CONFIG_CMD_KGDB)
+#define CONFIG_SYS_CBSIZE              1024            /* Console I/O 
Buffer Size      */
+#else
+#define CONFIG_SYS_CBSIZE              256             /* Console I/O 
Buffer Size      */
+#endif
+#define CONFIG_SYS_PBSIZE 
(CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
+#define CONFIG_SYS_MAXARGS             16              /* max number of 
command args   */
+#define CONFIG_SYS_BARGSIZE            CONFIG_SYS_CBSIZE       /* Boot 
Argument Buffer Size    */
+
+#define CONFIG_SYS_DEVICE_NULLDEV      1       /* include nulldev 
device       */
+#define CONFIG_SYS_CONSOLE_INFO_QUIET  1       /* don't print console @ 
startup        */
+#define CONFIG_AUTO_COMPLETE   1       /* add autocompletion support   */
+#define CONFIG_LOOPW           1       /* enable loopw command */
+#define CONFIG_MX_CYCLIC       1       /* enable mdc/mwc commands      */
+
+#define CONFIG_SYS_LOAD_ADDR           0x20000 /* default load address */
+
+#undef  CONFIG_SYS_DRAM_TEST
+#define CONFIG_SYS_MEMTEST_START       0x0
+#define CONFIG_SYS_MEMTEST_END         0x100000
+
+#define CONFIG_SYS_HZ                  1000
+
+/*
+ * Clock configuration: enable only one of the following options
+ */
+
+#undef  CONFIG_SYS_PLL_BYPASS                          /* bypass PLL 
for test purpose */
+#define        CONFIG_SYS_CLK                  90000000        /* 
MCF5307 run at 90MHz   */
+
+/*
+ * Low Level Configuration Settings
+ * (address mappings, register initial values, etc.)
+ * You should know what you are doing if you make changes here.
+ */
+
+#define CONFIG_SYS_MBAR                0x10000000      /* Register Base 
Addrs */
+
+
+/*-----------------------------------------------------------------------
+ * Definitions for initial stack pointer and data area (in DPRAM)
+ */
+#define CONFIG_SYS_INIT_RAM_ADDR       0x20000000
+#define CONFIG_SYS_INIT_RAM_SIZE       0x1000  /* Size of used area in 
internal SRAM   */
+#define CONFIG_SYS_GBL_DATA_OFFSET     (CONFIG_SYS_INIT_RAM_SIZE - 
GENERATED_GBL_DATA_SIZE)
+#define CONFIG_SYS_INIT_SP_OFFSET      CONFIG_SYS_GBL_DATA_OFFSET
+
+#define CONFIG_ENV_IS_IN_FLASH 1
+#define CONFIG_ENV_OFFSET      0x600   /* Address of Environment Sector*/
+#define CONFIG_ENV_SIZE                0x0400  /* Total Size of 
Environment Sector     */
+#define CONFIG_ENV_SECT_SIZE   0x0400  /* see README - env sector total 
size   */
+
+/*-----------------------------------------------------------------------
+ * Start addresses for the final memory configuration
+ * (Set up by the startup code)
+ * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0
+ */
+#define CONFIG_SYS_SDRAM_BASE          0x00000000
+#define CONFIG_SYS_SDRAM_SIZE          16              /* SDRAM size in 
MB */
+#define CONFIG_SYS_FLASH_BASE          0xffc00000
+#define CONFIG_SYS_MAX_FLASH_BANKS     1
+#define CONFIG_SYS_MAX_FLASH_SECT      1024    /* max number of sectors 
on one chip */
+#define CONFIG_SYS_FLASH_ERASE_TOUT    1000
+
+#define FLASH_SST3201B                 0x300
+
+#define CONFIG_SYS_SST_SECT            1024
+#define CONFIG_SYS_SST_SECTSZ          0x1000
+#define CONFIG_SYS_FLASH_WRITE_TOUT    500
+
+#define CONFIG_SYS_MONITOR_BASE                (CONFIG_SYS_FLASH_BASE + 
0x400)
+
+#define CONFIG_SYS_MONITOR_LEN         0x20000
+#define CONFIG_SYS_MALLOC_LEN          (1 * 1024*1024) /* Reserve 1 MB 
for malloc()    */
+#define CONFIG_SYS_BOOTPARAMS_LEN      64*1024
+
+/*
+ * For booting Linux, the board info and command line data
+ * have to be in the first 8 MB of memory, since this is
+ * the maximum mapped by the Linux kernel during initialization ??
+ */
+#define CONFIG_SYS_BOOTMAPSZ           (CONFIG_SYS_SDRAM_BASE + 
(CONFIG_SYS_SDRAM_SIZE << 20))
+
+/*-----------------------------------------------------------------------
+ * Cache Configuration
+ */
+#define CONFIG_SYS_CACHELINE_SIZE      16
+
+#define ICACHE_STATUS                  (CONFIG_SYS_INIT_RAM_ADDR + \
+                                        CONFIG_SYS_INIT_RAM_SIZE - 8)
+#define DCACHE_STATUS                  (CONFIG_SYS_INIT_RAM_ADDR + \
+                                        CONFIG_SYS_INIT_RAM_SIZE - 4)
+#define CONFIG_SYS_ICACHE_INV           (CF_CACR_CINVA)
+#define CONFIG_SYS_CACHE_ACR0          (CONFIG_SYS_FLASH_BASE | \
+                                        CF_ADDRMASK(2) | \
+                                        CF_ACR_EN | CF_ACR_SM_ALL)
+
+/* no ACR1 initialization for SDRAM before SDRAM init */
+
+#define CONFIG_SYS_CACHE_ICACR          (CF_CACR_EC | CF_CACR_CINVA | \
+                                        CF_CACR_DCM_P)
+
+
+/*-----------------------------------------------------------------------
+ * Memory bank definitions
+ */
+
+/* CS0 - AMD Flash, address 0xffc00000 */
+#define        CONFIG_SYS_CS0_BASE             (CONFIG_SYS_FLASH_BASE)
+#define        CONFIG_SYS_CS0_CTRL             0x00001980      /* 
WS=10, AA=1, PS=16bit (10) */
+#define        CONFIG_SYS_CS0_MASK             0x003f0001      /* 4MB, 
AA=0,V=1  C/I BIT !!!!! */
+
+/* CS1 - DM9000 Ethernet Controller, address 0x30000000 */
+#define CONFIG_SYS_CS1_BASE            0x30000000
+#define CONFIG_SYS_CS1_CTRL            0x00000100
+#define CONFIG_SYS_CS1_MASK            0x00070001
+
+#endif  //_AMCORE_H
diff --git a/include/flash.h b/include/flash.h
index 7db599e..7b8bff0 100644
--- a/include/flash.h
+++ b/include/flash.h
@@ -282,6 +282,7 @@ extern flash_info_t *flash_get_info(ulong base);
  #define SST_ID_xF1601  0x234B234B      /* 39xF1601 ID (16M =   1M x 16 
)       */
  #define SST_ID_xF1602  0x234A234A      /* 39xF1602 ID (16M =   1M x 16 
)       */
  #define SST_ID_xF3201  0x235B235B      /* 39xF3201 ID (32M =   2M x 16 
)       */
+#define SST_ID_xF3201B 0x235D235D      /* 39xF320B1 ID (32M =  2M x 16 
)       */
  #define SST_ID_xF3202  0x235A235A      /* 39xF3202 ID (32M =   2M x 16 
)       */
  #define SST_ID_xF6401  0x236B236B      /* 39xF6401 ID (64M =   4M x 16 
)       */
  #define SST_ID_xF6402  0x236A236A      /* 39xF6402 ID (64M =   4M x 16 
)       */



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