[U-Boot] [PATCH 2/2] MX28: SPI: Fix the DMA chaining
Stefano Babic
sbabic at denx.de
Thu Sep 6 14:20:20 CEST 2012
On 01/09/2012 04:08, Marek Vasut wrote:
> It turns out that in order for the SPI DMA to properly support
> continuous transfers longer than 65280 bytes, there are some very
> important parts that were left out from the documentation.
>
> Firstly, the XFER_SIZE register is not written with the whole length
> of a transfer, but is written by each and every chained descriptor
> with the length of the descriptors data buffer.
>
> Next, unlike the demo code supplied by FSL, which only writes one PIO
> word per descriptor, this does not apply if the descriptors are chained,
> since the XFER_SIZE register must be written. Therefore, it is essential
> to use four PIO words, CTRL0, CMD0, CMD1, XFER_SIZE. CMD0 and CMD1 are
> written with zero, since they don't apply. The DMA programs the PIO words
> in an incrementing order, so four PIO words.
>
> Finally, unlike the demo code supplied by FSL, the SSP_CTRL0_IGNORE_CRC
> must not be set during the whole transfer, but it must be set only on the
> last descriptor in the chain.
>
> Signed-off-by: Marek Vasut <marex at denx.de>
> Cc: Fabio Estevam <festevam at gmail.com>
> Cc: Otavio Salvador <otavio at ossystems.com.br>
> Cc: Stefano Babic <sbabic at denx.de>
> ---
Applied to u-boot-imx, thanks.
Best regards,
Stefano Babic
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