[U-Boot] [PATCH v4 1/6] nand: Try to align the default buffers

[Marek Vasut]

Dear Tom Warren,

> Simon,
> 
> > -----Original Message-----
> > From: Simon Glass [mailto:sjg at chromium.org]
> > Sent: Sunday, July 29, 2012 11:53 PM
> > To: U-Boot Mailing List
> > Cc: Tom Warren; Stephen Warren; Scott Wood; Simon Glass
> > Subject: [PATCH v4 1/6] nand: Try to align the default buffers
> > 
> > The NAND layer needs to use cache-aligned buffers by default. Towards
> > this goal. align the default buffers and their members according to the
> > minimum DMA alignment defined for the architecture.
> > 
> > Signed-off-by: Simon Glass <sjg at chromium.org>
> > ---
> > Changes in v2:
> > - Add new patch to align default buffers in nand_base
> > 
> >  drivers/mtd/nand/nand_base.c |    3 ++-
> >  include/linux/mtd/nand.h     |    7 ++++---
> >  2 files changed, 6 insertions(+), 4 deletions(-)
> > 
> > diff --git a/drivers/mtd/nand/nand_base.c b/drivers/mtd/nand/nand_base.c
> > index bfd668f..891af1f 100644
> > --- a/drivers/mtd/nand/nand_base.c
> > +++ b/drivers/mtd/nand/nand_base.c
> > @@ -2936,7 +2936,8 @@ int nand_scan_tail(struct mtd_info *mtd)
> > 
> >  	struct nand_chip *chip = mtd->priv;
> >  	
> >  	if (!(chip->options & NAND_OWN_BUFFERS))
> > 
> > -		chip->buffers = kmalloc(sizeof(*chip->buffers), GFP_KERNEL);
> > +		chip->buffers = memalign(ARCH_DMA_MINALIGN,
> > +					 sizeof(*chip->buffers));
> > 
> >  	if (!chip->buffers)
> >  	
> >  		return -ENOMEM;
> > 
> > diff --git a/include/linux/mtd/nand.h b/include/linux/mtd/nand.h index
> > 82704de..dc839e7 100644
> > --- a/include/linux/mtd/nand.h
> > +++ b/include/linux/mtd/nand.h
> > @@ -391,9 +391,10 @@ struct nand_ecc_ctrl {
> > 
> >   * consecutive order.
> >   */
> >  
> >  struct nand_buffers {
> > 
> > -	uint8_t	ecccalc[NAND_MAX_OOBSIZE];
> > -	uint8_t	ecccode[NAND_MAX_OOBSIZE];
> > -	uint8_t databuf[NAND_MAX_PAGESIZE + NAND_MAX_OOBSIZE];
> > +	uint8_t	ecccalc[ALIGN(NAND_MAX_OOBSIZE, ARCH_DMA_MINALIGN)];
> > +	uint8_t	ecccode[ALIGN(NAND_MAX_OOBSIZE, ARCH_DMA_MINALIGN)];
> > +	uint8_t databuf[ALIGN(NAND_MAX_PAGESIZE + NAND_MAX_OOBSIZE,
> > +			      ARCH_DMA_MINALIGN)];
> > 
> >  };


include asm/cache.h or something ?

> This causes build failures in the M28EVK build (./MAKEALL -a arm, with
> current u-boot-tegra/next & gcc 4.4.1):
> 
> In file included from mxs_nand.c:29:
> /home/tom/denx/uboot-tegra/include/linux/mtd/nand.h:394: warning: implicit
> declaration of function 'ALIGN'
> /home/tom/denx/uboot-tegra/include/linux/mtd/nand.h:394: error:
> 'ARCH_DMA_MINALIGN' undeclared here (not in a function)
> /home/tom/denx/uboot-tegra/include/linux/mtd/nand.h:394: error: variably
> modified 'ecccalc' at file scope
> /home/tom/denx/uboot-tegra/include/linux/mtd/nand.h:395: error: variably
> modified 'ecccode' at file scope
> /home/tom/denx/uboot-tegra/include/linux/mtd/nand.h:397: error: variably
> modified 'databuf' at file scope make[1]: *** [mxs_nand.o] Error 1
> make[1]: *** Waiting for unfinished jobs....
> make: *** [drivers/mtd/nand/libnand.o] Error 2
> make: *** Waiting for unfinished jobs....
> 
> PTAL. Thanks,
> 
> Tom
> 
> >  /**
> > 
> > --
> > 1.7.7.3

Best regards,
Marek Vasut