[U-Boot] [PATCH 2/3] i2c: sh_i2c.c: correct BUSY bit define in ICSR

[Nobuhiro Iwamatsu]

Hi,

I add Heiko Schocher <hs at denx.de> to Cc:
Heiko is I2C maintainer.

On Tue, Sep 11, 2012 at 2:58 PM, Tetsuyuki Kobayashi <koba at kmckk.co.jp> wrote:
> Correct BUSY bit define in ICSR from (1<<3) to (1<<4).
>
> Signed-off-by: Tetsuyuki Kobayashi <koba at kmckk.co.jp>

> ---
> Iwamatsu-san,
> I guess this was mistake. But I don't have technical document other than SH73A0.
> Could you verify?

Yes, this is typo. 3 is AL bit. Thanks!

Acked-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj at renesas.com>

>
>  drivers/i2c/sh_i2c.c |    2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/i2c/sh_i2c.c b/drivers/i2c/sh_i2c.c
> index 59402ba..84f1f5b 100644
> --- a/drivers/i2c/sh_i2c.c
> +++ b/drivers/i2c/sh_i2c.c
> @@ -43,7 +43,7 @@ static struct sh_i2c *base;
>  #define SH_I2C_ICCR_SCP                (1 << 0)
>
>  /* ICSR / ICIC */
> -#define SH_IC_BUSY     (1 << 3)
> +#define SH_IC_BUSY     (1 << 4)
>  #define SH_IC_TACK     (1 << 2)
>  #define SH_IC_WAIT     (1 << 1)
>  #define SH_IC_DTE      (1 << 0)
> --
> 1.7.9.5
>

-- 
Nobuhiro Iwamatsu