[U-Boot] [PATCH 5/9] Tegra: DT: Add preliminary device tree files for T30 Cardhu
Tom Warren
twarren.nvidia at gmail.com
Thu Sep 13 00:10:51 CEST 2012
Signed-off-by: Tom Warren <twarren at nvidia.com>
---
arch/arm/dts/tegra30.dtsi | 280 +++++++++++++++++++++++++++++++++++
board/nvidia/dts/tegra30-cardhu.dts | 92 ++++++++++++
2 files changed, 372 insertions(+), 0 deletions(-)
create mode 100644 arch/arm/dts/tegra30.dtsi
create mode 100644 board/nvidia/dts/tegra30-cardhu.dts
diff --git a/arch/arm/dts/tegra30.dtsi b/arch/arm/dts/tegra30.dtsi
new file mode 100644
index 0000000..a889705
--- /dev/null
+++ b/arch/arm/dts/tegra30.dtsi
@@ -0,0 +1,280 @@
+/include/ "skeleton.dtsi"
+
+/ {
+ model = "NVIDIA Tegra30";
+ compatible = "nvidia,tegra30";
+ interrupt-parent = <&intc>;
+
+ tegra_car: clock at 60006000 {
+ compatible = "nvidia,tegra30-car";
+ reg = <0x60006000 0x1000>;
+ #clock-cells = <1>;
+ };
+
+ clocks {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ osc: clock {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ };
+ };
+
+ intc: interrupt-controller at 50041000 {
+ compatible = "nvidia,tegra30-gic";
+ interrupt-controller;
+ #interrupt-cells = <1>;
+ reg = < 0x50041000 0x1000 >,
+ < 0x50040100 0x0100 >;
+ };
+
+ i2c at 7000c000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "nvidia,tegra30-i2c";
+ reg = <0x7000C000 0x100>;
+ interrupts = < 70 >;
+ /* PERIPH_ID_I2C1, PLL_P_OUT3 */
+ clocks = <&tegra_car 12>, <&tegra_car 124>;
+ };
+
+ i2c at 7000c400 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "nvidia,tegra30-i2c";
+ reg = <0x7000C400 0x100>;
+ interrupts = < 116 >;
+ /* PERIPH_ID_I2C2, PLL_P_OUT3 */
+ clocks = <&tegra_car 54>, <&tegra_car 124>;
+ };
+
+ i2c at 7000c500 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "nvidia,tegra30-i2c";
+ reg = <0x7000C500 0x100>;
+ interrupts = < 124 >;
+ /* PERIPH_ID_I2C3, PLL_P_OUT3 */
+ clocks = <&tegra_car 67>, <&tegra_car 124>;
+ };
+
+ i2c at 7000d000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "nvidia,tegra30-i2c-dvc";
+ reg = <0x7000D000 0x200>;
+ interrupts = < 85 >;
+ /* PERIPH_ID_DVC_I2C, PLL_P_OUT3 */
+ clocks = <&tegra_car 47>, <&tegra_car 124>;
+ };
+
+ i2s at 70002800 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "nvidia,tegra30-i2s";
+ reg = <0x70002800 0x200>;
+ interrupts = < 45 >;
+ dma-channel = < 2 >;
+ };
+
+ i2s at 70002a00 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "nvidia,tegra30-i2s";
+ reg = <0x70002a00 0x200>;
+ interrupts = < 35 >;
+ dma-channel = < 1 >;
+ };
+
+ das at 70000c00 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "nvidia,tegra30-das";
+ reg = <0x70000c00 0x80>;
+ };
+
+ gpio: gpio at 6000d000 {
+ compatible = "nvidia,tegra30-gpio";
+ reg = < 0x6000d000 0x1000 >;
+ interrupts = < 64 65 66 67 87 119 121 >;
+ #gpio-cells = <2>;
+ gpio-controller;
+ };
+
+ pinmux: pinmux at 70000000 {
+ compatible = "nvidia,tegra30-pinmux";
+ reg = < 0x70000014 0x10 /* Tri-state registers */
+ 0x70000080 0x20 /* Mux registers */
+ 0x700000a0 0x14 /* Pull-up/down registers */
+ 0x70000868 0xa8 >; /* Pad control registers */
+ };
+
+ serial at 70006000 {
+ compatible = "nvidia,tegra30-uart";
+ reg = <0x70006000 0x40>;
+ id = <0>;
+ reg-shift = <2>;
+ interrupts = < 68 >;
+ status = "disabled";
+ };
+
+ serial at 70006040 {
+ compatible = "nvidia,tegra30-uart";
+ reg = <0x70006040 0x40>;
+ id = <1>;
+ reg-shift = <2>;
+ interrupts = < 69 >;
+ status = "disabled";
+ };
+
+ serial at 70006200 {
+ compatible = "nvidia,tegra30-uart";
+ reg = <0x70006200 0x100>;
+ id = <2>;
+ reg-shift = <2>;
+ interrupts = < 78 >;
+ status = "disabled";
+ };
+
+ serial at 70006300 {
+ compatible = "nvidia,tegra30-uart";
+ reg = <0x70006300 0x100>;
+ id = <3>;
+ reg-shift = <2>;
+ interrupts = < 122 >;
+ status = "disabled";
+ };
+
+ serial at 70006400 {
+ compatible = "nvidia,tegra30-uart";
+ reg = <0x70006400 0x100>;
+ id = <4>;
+ reg-shift = <2>;
+ interrupts = < 123 >;
+ status = "disabled";
+ };
+
+ sdhci at 78000000 {
+ compatible = "nvidia,tegra30-sdhci";
+ reg = <0x78000000 0x200>;
+ interrupts = < 46 >;
+ periph-id = <14>; // PERIPH_ID_SDMMC1
+ status = "disabled";
+ };
+
+ sdhci at 78000200 {
+ compatible = "nvidia,tegra30-sdhci";
+ reg = <0x78000200 0x200>;
+ interrupts = < 47 >;
+ periph-id = <9>; // PERIPH_ID_SDMMC2
+ status = "disabled";
+ };
+
+ sdhci at 78000400 {
+ compatible = "nvidia,tegra30-sdhci";
+ reg = <0x78000400 0x200>;
+ interrupts = < 51 >;
+ periph-id = <69>; // PERIPH_ID_SDMMC3
+ status = "disabled";
+ };
+
+ sdhci at 78000600 {
+ compatible = "nvidia,tegra30-sdhci";
+ reg = <0x78000600 0x200>;
+ interrupts = < 63 >;
+ periph-id = <15>; // PERIPH_ID_SDMMC4
+ status = "disabled";
+ };
+
+ pwfm0: pwm at 7000a000 {
+ compatible = "nvidia,tegra30-sdhci";
+ reg = <0x7000a000 0x4>;
+ status = "disabled";
+ };
+
+ pwfm1: pwm at 7000a010 {
+ compatible = "nvidia,tegra30-sdhci";
+ reg = <0x7000a010 0x4>;
+ status = "disabled";
+ };
+
+ pwfm2: pwm at 7000a020 {
+ compatible = "nvidia,tegra30-sdhci";
+ reg = <0x7000a020 0x4>;
+ status = "disabled";
+ };
+
+ pwfm3: pwm at 7000a030 {
+ compatible = "nvidia,tegra30-sdhci";
+ reg = <0x7000a030 0x4>;
+ status = "disabled";
+ };
+
+ display1: display at 0x54200000 {
+ compatible = "nvidia,tegra30-display";
+ reg = <0x54200000 0x40000>;
+ status = "disabled";
+ };
+
+ usb at c5000000 {
+ compatible = "nvidia,tegra30-ehci", "usb-ehci";
+ reg = <0xc5000000 0x4000>;
+ interrupts = < 52 >;
+ phy_type = "utmi";
+ clocks = <&tegra_car 22>; /* PERIPH_ID_USBD */
+ nvidia,has-legacy-mode;
+ };
+
+ usbparams at 0 {
+ compatible = "nvidia,tegra30-usbparams";
+ osc-frequency = <13000000>;
+ /* DivN, DivM, DivP, CPCON, LFCON, Delays Debounce, Bias */
+ params = <0x3c0 0x0d 0x00 0xc 0 0x02 0x33 0x05 0x7f 0x7ef4 5>;
+ };
+
+ usbparams at 1 {
+ compatible = "nvidia,tegra30-usbparams";
+ osc-frequency = <19200000>;
+ params = <0x0c8 0x04 0x00 0x3 0 0x03 0x4b 0x06 0xbb 0xbb80 7>;
+ };
+
+ usbparams at 2 {
+ compatible = "nvidia,tegra30-usbparams";
+ osc-frequency = <12000000>;
+ params = <0x3c0 0x0c 0x00 0xc 0 0x02 0x2f 0x08 0x76 0x7530 5>;
+ };
+
+ usbparams at 3 {
+ compatible = "nvidia,tegra30-usbparams";
+ osc-frequency = <26000000>;
+ params = <0x3c0 0x1a 0x00 0xc 0 0x04 0x66 0x11 0xfe 0xfde8 9>;
+ };
+
+ usb at 7d000000 {
+ compatible = "nvidia,tegra30-usb";
+ reg = <0x7d000000 0x8000>;
+ interrupts = < 53 >;
+ phy_type = "ulpi";
+ periph-id = <22>; /* PERIPH_ID_USBD */
+ clocks = <&tegra_car 58>;
+ status = "disabled";
+ };
+
+ usb at 7d008000 {
+ compatible = "nvidia,tegra30-ehci", "usb-ehci";
+ reg = <0x7d008000 0x8000>;
+ interrupts = < 129 >;
+ phy_type = "utmi";
+ periph-id = <59>; /* PERIPH_ID_USB3 */
+ clocks = <&tegra_car 59>;
+ status = "disabled";
+ };
+
+ emc at 7000f400 {
+ #address-cells = < 1 >;
+ #size-cells = < 0 >;
+ compatible = "nvidia,tegra30-emc";
+ reg = <0x7000f400 0x200>;
+ };
+};
diff --git a/board/nvidia/dts/tegra30-cardhu.dts b/board/nvidia/dts/tegra30-cardhu.dts
new file mode 100644
index 0000000..7b2ccdf
--- /dev/null
+++ b/board/nvidia/dts/tegra30-cardhu.dts
@@ -0,0 +1,92 @@
+/dts-v1/;
+
+/memreserve/ 0x1c000000 0x04000000;
+/include/ ARCH_CPU_DTS
+
+/ {
+ model = "NVIDIA Cardhu";
+ compatible = "nvidia,cardhu", "nvidia,tegra30";
+
+ aliases {
+ /* This defines the order of our USB ports */
+ usb0 = "/usb at 7d008000";
+ usb1 = "/usb at 7d000000";
+
+ sdmmc0 = "/sdhci at 78000600";
+ sdmmc1 = "/sdhci at 78000000";
+ };
+
+ chosen {
+ bootargs = "";
+ };
+
+ memory {
+ device_type = "memory";
+ reg = <0x80000000 0xc0000000>;
+ };
+
+ /* This is not used in U-Boot, but is expected to be in kernel .dts */
+ i2c at 7000d000 {
+ clock-frequency = <100000>;
+ pmic at 34 {
+ compatible = "ti,tps6586x";
+ reg = <0x34>;
+
+ clk_32k: clock {
+ compatible = "fixed-clock";
+ /*
+ * leave out for now due to CPP:
+ * #clock-cells = <0>;
+ */
+ clock-frequency = <32768>;
+ };
+ };
+ };
+
+ clocks {
+ osc {
+ clock-frequency = <12000000>;
+ };
+ };
+
+ clock at 60006000 {
+ clocks = <&clk_32k &osc>;
+ };
+
+ serial at 70006000 {
+ status = "ok";
+ clock-frequency = < 216000000 >;
+ };
+
+ sdhci at 78000000 {
+ status = "ok";
+ width = <4>; /* width of SDIO port */
+ removable = <1>;
+ /* Parameter 3 bit 0:1=output, 0=input; bit 1:1=high, 0=low */
+ cd-gpios = <&gpio 69 0>; /* card detect, gpio PI5 */
+ wp-gpios = <&gpio 155 0>; /* write protect, gpio PT3 */
+ power-gpios = <&gpio 31 3>; /* power enable, gpio PD7 */
+ };
+
+ sdhci at 78000600 {
+ status = "ok";
+ width = <4>; /* width of SDIO port, s/b 8? */
+ removable = <0>;
+ };
+ usb at 0x7d000000 {
+ status = "ok";
+ host-mode = <1>;
+ vbus_pullup-gpio = <&gpio 233 3>; /* PDD1, EN_3V3_PU */
+ };
+
+ usbphy: usbphy at 0 {
+ compatible = "smsc,usb3315";
+ status = "ok";
+ };
+
+ usb at 0x7d008000 {
+ status = "ok";
+ utmi = <&usbphy>;
+ host-mode = <0>;
+ };
+};
--
1.7.0.4
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