[U-Boot] [PATCH 5/7] S3C24XX: Add NAND Flash driver

[José Miguel Gonçalves]

Hi Marek,

On 09/12/2012 10:11 PM, Marek Vasut wrote:
> Dear José Miguel Gonçalves,
>
>> +
>> +/*
>> + * Hardware specific access to control-lines function
>> + */
>> +static void s3c_nand_hwcontrol(struct mtd_info *mtd, int cmd, unsigned int
>> ctrl) +{
>> +	s3c24xx_nand *const nand = s3c24xx_get_base_nand();
>> +	struct nand_chip *this = mtd->priv;
>> +
>> +	if (ctrl & NAND_CTRL_CHANGE) {
>> +		if (ctrl & NAND_CLE)
>> +			this->IO_ADDR_W = (void __iomem *)&nand->nfcmmd;
>> +		else if (ctrl & NAND_ALE)
>> +			this->IO_ADDR_W = (void __iomem *)&nand->nfaddr;
>> +		else
>> +			this->IO_ADDR_W = (void __iomem *)&nand->nfdata;
> Do you need this cast ?

Without it gcc gives me a warning:

s3c24xx_nand.c:90:20: warning: assignment discards `volatile' qualifier 
from pointer target type [enabled by default]

> +/*
> + * Board-specific NAND initialization.
> + */
> +int board_nand_init(struct nand_chip *nand)
> +{
> +	static int chip_n = 0;
> +	s3c24xx_nand *const nand_reg = s3c24xx_get_base_nand();
> +	u_long nfconf, nfcont;
> +
> +	if (chip_n == 0) {
> +		/* Extend NAND timings to the maximum */
> +		nfconf = readl(&nand_reg->nfconf);
> +		nfconf |= 0x7770;
> Magic
>
>> +		writel(nfconf, &nand_reg->nfconf);
>> +
>> +		/* Disable chip selects and soft lock, enable controller */
>> +		nfcont = readl(&nand_reg->nfcont);
>> +		nfcont &= ~NFCONT_WP;
>> +		nfcont |= NFCONT_NCE1 | NFCONT_NCE0 | NFCONT_ENABLE;
>> +		writel(nfcont, &nand_reg->nfcont);
> use clrsetbits_le32()

I will do that and also define some macros for the magic values.

Regards,
José Gonçalves