[U-Boot] [PATCH 3/4 v3] arm: Support new Xilinx Zynq platform

[Michal Simek]

On 09/14/2012 12:58 PM, Marek Vasut wrote:
> Dear Michal Simek,
>
>> On 09/14/2012 11:59 AM, Marek Vasut wrote:
>>> Dear Michal Simek,
>>>
>>>> On 09/14/2012 09:50 AM, Marek Vasut wrote:
>>>>> Dear Michal Simek,
>>>>>
>>>>>> Add timer driver.
>>>>>>
>>>>>> Signed-off-by: Michal Simek <monstr at monstr.eu>
>>>>>> CC: Joe Hershberger <joe.hershberger at gmail.com>
>>>>>> CC: Marek Vasut <marex at denx.de>
>>>>>>
>>>>>> ---
>>>>>> v2: Move lowlevel_init.S from board to cpu folder
>>>>>>
>>>>>>        Remove XPSS prefix
>>>>>>        Rename XSCUTIMER -> SCUTIMER
>>>>>>
>>>>>> v3: Using clrsetbits_le32
>>>>>>
>>>>>>        Fix compilation warning
>>>>>>        Move reset_cpu from board to cpu.c
>>>>>>        Move lowlevel_init to cpu.c
>>>>>
>>>>> [...]
>>>>>
>>>>>> +#include <common.h>
>>>>>> +
>>>>>> +inline void lowlevel_init(void) {}
>>>>>> +
>>>>>> +void reset_cpu(ulong addr)
>>>>>> +{
>>>>>> +	while (1)
>>>>>> +		;
>>>>>> +}
>>>>>
>>>>> I wonder how useful such CPU is if simple endless loop restarts it ;-)
>>>>
>>>> Don't be scared it will be fixed when slcr is ready.
>>>
>>> Nay, I was just rambling and giving you a bit of torture :-)
>> :
>> :-)
>> :
>>> What's SLCR ?
>>
>> System level control registers. For example for clock setup, unit reset,
>> ddr setup configuration pin setup, etc.
>
> Shouldn't that be part of this patchset then?

No. Basic setup is done in first stage bootloader. I will talk with
Xilinx how to handle this. I think that special driver(in zynq cpu folder)
for slcr make sense to have all SLCR operation at one place and not
to call it directly.

Thanks,
Michal

-- 
Michal Simek, Ing. (M.Eng)
w: www.monstr.eu p: +42-0-721842854
Maintainer of Linux kernel 2.6 Microblaze Linux - http://www.monstr.eu/fdt/
Microblaze U-BOOT custodian