[U-Boot] [PATCH V2 10/21] mx6q_4x_mt41j128.cfg: allow plugin to work
Troy Kisky
troy.kisky at boundarydevices.com
Sat Sep 22 04:39:07 CEST 2012
Enabling plugin mode seems to require this additional
memory write for ddr3 initialization.
Signed-off-by: Troy Kisky <troy.kisky at boundarydevices.com>
---
board/freescale/imx/ddr/mx6q_4x_mt41j128.cfg | 2 ++
1 file changed, 2 insertions(+)
diff --git a/board/freescale/imx/ddr/mx6q_4x_mt41j128.cfg b/board/freescale/imx/ddr/mx6q_4x_mt41j128.cfg
index a95831f..eea8d3a 100644
--- a/board/freescale/imx/ddr/mx6q_4x_mt41j128.cfg
+++ b/board/freescale/imx/ddr/mx6q_4x_mt41j128.cfg
@@ -111,6 +111,8 @@ WRITE_ENTRY1(MMDC_P1 + MMDC_MPRDDQBY0DL, 0x33333333)
WRITE_ENTRY1(MMDC_P1 + MMDC_MPRDDQBY1DL, 0x33333333)
WRITE_ENTRY1(MMDC_P1 + MMDC_MPRDDQBY2DL, 0x33333333)
WRITE_ENTRY1(MMDC_P1 + MMDC_MPRDDQBY3DL, 0x33333333)
+/* MDPDC - CKE pulse width = 3 cycles. CKSRE = 6 cycles, CKSRX = 6 cycles */
+WRITE_ENTRY1(MMDC_P0 + MMDC_MDPDC, 0x00020036)
WRITE_ENTRY1(MMDC_P0 + MMDC_MDMISC, 0x00081740)
--
1.7.9.5
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