[U-Boot] [PATCH v2 12/14] mx5 clocks: Fix MXC_FEC_CLK

[Benoît Thébaudeau]

The FEC clock does not come from PLL1, but from the IPG clock. The previous code
was even inconsistent with itself, returning the IPG clock as expected for
imx_get_fecclk(), but the PLL1 clock for mxc_get_clock(MXC_FEC_CLK).

Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau at advansee.com>
Cc: Stefano Babic <sbabic at denx.de>
---
This patch supersedes http://patchwork.ozlabs.org/patch/177411/ .
Changes for v2:
 - Consequences from the previous cleanup patches.
 - Add detailed description.

 .../arch/arm/cpu/armv7/mx5/clock.c                 |    5 ++---
 1 file changed, 2 insertions(+), 3 deletions(-)

diff --git u-boot-imx-e1eb75b.orig/arch/arm/cpu/armv7/mx5/clock.c u-boot-imx-e1eb75b/arch/arm/cpu/armv7/mx5/clock.c
index 232d7c8..32dbece 100644
--- u-boot-imx-e1eb75b.orig/arch/arm/cpu/armv7/mx5/clock.c
+++ u-boot-imx-e1eb75b/arch/arm/cpu/armv7/mx5/clock.c
@@ -468,7 +468,7 @@ unsigned int mxc_get_clock(enum mxc_clock clk)
 	case MXC_CSPI_CLK:
 		return imx_get_cspiclk();
 	case MXC_FEC_CLK:
-		return decode_pll(mxc_plls[PLL1_CLOCK], MXC_HCLK);
+		return get_ipg_clk();
 	case MXC_SATA_CLK:
 		return get_ahb_clk();
 	case MXC_DDR_CLK:
@@ -484,10 +484,9 @@ u32 imx_get_uartclk(void)
 	return get_uart_clk();
 }
 
-
 u32 imx_get_fecclk(void)
 {
-	return mxc_get_clock(MXC_IPG_CLK);
+	return get_ipg_clk();
 }
 
 static int gcd(int m, int n)