[U-Boot] RMII ethernet problems on i.MX6 Solo

[Carolyn Smith]

On Thu, Sep 27, 2012 at 12:00 PM, Fabio Estevam <festevam at gmail.com> wrote:
>
> On Thu, Sep 27, 2012 at 3:27 PM, Carolyn Smith <carolynsmi56 at gmail.com> wrote:
> > Hello,
> >
> > Has anyone had any success getting RMII ethernet to work on an i.MX6 Solo
> > or DualLite? I am pretty confident I have the IOMUX registers set up
> > properly and the clocking configured and working properly but am not seeing
> > any activity on the TXEN line when trying to transmit a packet.I can access
> > the PHY's registers so I think that means MDC and MDIO must be working.
>
> Which Ethernet PHY are you using and which board?
>
> Can you post your patches in the list for review, so that we can try
> to understand the problem better?
>
> Regards,
>
> Fabio Estevam


It's an SMSC LAN8720A PHY on a custom i.MX6 Solo board. I can't post
all my patches at this point but I could provide register dumps of
anything you think might be relevant.

I did make a change to fec_mxc.c in the fec_open function. I #ifdef'ed
out this section

#ifdef FEC_QUIRK_ENET_MAC
	{
		u32 ecr = readl(&fec->eth->ecntrl) & ~FEC_ECNTRL_SPEED;
		u32 rcr = (readl(&fec->eth->r_cntrl) &
				~(FEC_RCNTRL_RMII | FEC_RCNTRL_RMII_10T)) |
				FEC_RCNTRL_RGMII | FEC_RCNTRL_MII_MODE;
		if (speed == _1000BASET)
			ecr |= FEC_ECNTRL_SPEED;
		else if (speed != _100BASET)
			rcr |= FEC_RCNTRL_RMII_10T;
		writel(ecr, &fec->eth->ecntrl);
		writel(rcr, &fec->eth->r_cntrl);
	}
#endif

Since it seems to put the ENET_RCR register into RGMII mode which is
not what I am using. I have ENET_RCR set to 0x05ee0124.

Thanks,
Carolyn