[U-Boot] [PATCH RFC 21/22] i.MX6: MX6Q: update CAAM_WRAPPER declaration to match MX6DL
Eric Nelson
eric.nelson at boundarydevices.com
Sat Aug 31 23:38:49 CEST 2013
Signed-off-by: Eric Nelson <eric.nelson at boundarydevices.com>
---
arch/arm/include/asm/arch-mx6/mx6q_pins.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/include/asm/arch-mx6/mx6q_pins.h b/arch/arm/include/asm/arch-mx6/mx6q_pins.h
index 2e26452..cd0625d 100644
--- a/arch/arm/include/asm/arch-mx6/mx6q_pins.h
+++ b/arch/arm/include/asm/arch-mx6/mx6q_pins.h
@@ -1569,7 +1569,7 @@ enum {
MX6_PAD_SD1_DAT1__ANATOP_ANATOP_TESTO_8 = IOMUX_PAD(0x0724, 0x033C, 7, 0x0000, 0, 0),
MX6_PAD_SD1_DAT0__USDHC1_DAT0 = IOMUX_PAD(0x0728, 0x0340, 0, 0x0000, 0, 0),
MX6_PAD_SD1_DAT0__ECSPI5_MISO = IOMUX_PAD(0x0728, 0x0340, 1, 0x082C, 1, 0),
- MX6_PAD_SD1_DAT0__CAAM_WRAP_RNG_OSCOBS = IOMUX_PAD(0x0728, 0x0340, 2, 0x0000, 0, 0),
+ MX6_PAD_SD1_DAT0__CAAM_WRAPPER_RNG_OSC_OBS = IOMUX_PAD(0x0728, 0x0340, 2, 0x0000, 0, 0),
MX6_PAD_SD1_DAT0__GPT_CAPIN1 = IOMUX_PAD(0x0728, 0x0340, 3, 0x0000, 0, 0),
MX6_PAD_SD1_DAT0__PCIE_CTRL_DIAG_STATUS_BUS_MUX_8 = IOMUX_PAD(0x0728, 0x0340, 4, 0x0000, 0, 0),
MX6_PAD_SD1_DAT0__GPIO_1_16 = IOMUX_PAD(0x0728, 0x0340, 5, 0x0000, 0, 0),
--
1.8.1.2
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