[U-Boot] [U-Boot, V2, 3/3] ARM: DRA7/OMAP5: EMIF: Add workaround for bug 0039

Tom Rini trini at ti.com
Wed Dec 4 23:04:11 CET 2013


On Fri, Nov 08, 2013 at 05:40:38PM +0530, SRICHARAN R wrote:

> When core power domain hits oswr, then DDR3 memories does not come back
> while resuming. This is because when EMIF registers are lost, then the
> controller takes care of copying the values from the shadow registers.
> If the shadow registers are not updated with the right values, then this
> results in incorrect settings while resuming. So updating the shadow registers
> with the corresponding status registers here during the boot.
> 
> Signed-off-by: Sricharan R <r.sricharan at ti.com>

Applied to u-boot-ti/master, thanks!

-- 
Tom
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