[U-Boot] [PATCH 4/9 V9] Exynos5420: Add DDR3 initialization for 5420
Minkyu Kang
mk7.kang at samsung.com
Thu Dec 5 08:43:37 CET 2013
On 05/12/13 16:25, Rajeshwari Birje wrote:
> Hi Minkyu Kang,
>
> Thank you for comments.
>
> On Tue, Dec 3, 2013 at 11:45 AM, Minkyu Kang <mk7.kang at samsung.com> wrote:
>> Dear Rajeshwari S Shinde,
>>
>> On 02/12/13 20:47, Rajeshwari S Shinde wrote:
>>> This patch intends to add DDR3 initialization code for Exynos5420.
>>>
>>> Signed-off-by: Rajeshwari S Shinde <rajeshwari.s at samsung.com>
>>> Signed-off-by: Akshay Saraswat <akshay.s at samsung.com>
>>> Acked-by: Simon Glass <sjg at chromium.org>
>>> ---
>>> Changes in V2:
>>> - Corrected a compilation issue for SMDK5250.
>>> Changes in V3:
>>> - None
>>> Changes in V4:
>>> - None
>>> Changes in V5:
>>> - None
>>> Changes in V6:
>>> - None
>>> Changes in V7:
>>> - Fixed multi line comment.
>>> Changes in V8:
>>> - None
>>> Changes in V9:
>>> - Used samsung_get base to get the dmc base address
>>> arch/arm/cpu/armv7/exynos/dmc_common.c | 10 +-
>>> arch/arm/cpu/armv7/exynos/dmc_init_ddr3.c | 425 +++++++++++++++++++++++++++++-
>>> arch/arm/cpu/armv7/exynos/exynos5_setup.h | 2 +
>>> arch/arm/include/asm/arch-exynos/cpu.h | 4 +
>>> arch/arm/include/asm/arch-exynos/dmc.h | 123 ++++++---
>>> arch/arm/include/asm/arch-exynos/power.h | 6 +
>>> 6 files changed, 525 insertions(+), 45 deletions(-)
>>>
>>> diff --git a/arch/arm/cpu/armv7/exynos/exynos5_setup.h b/arch/arm/cpu/armv7/exynos/exynos5_setup.h
>>> index c8d6515..42a7fb8 100644
>>> --- a/arch/arm/cpu/armv7/exynos/exynos5_setup.h
>>> +++ b/arch/arm/cpu/armv7/exynos/exynos5_setup.h
>>> @@ -436,6 +436,7 @@
>>> */
>>> #ifndef CONFIG_SMDK5420
>>>
>>> +
>>
>> unnecessary blank line.
> will remove this
>>
>>> /* APLL_CON1 */
>>> #define APLL_CON1_VAL (0x00203800)
>>>
>>> @@ -696,6 +697,7 @@
>>> #define CLK_DIV_CPERI1_VAL NOT_AVAILABLE
>>>
>>> #else
>>> +#define PAD_RETENTION_DRAM_COREBLK_VAL 0x10000000
>>>
>>> /* APLL_CON1 */
>>> #define APLL_CON1_VAL (0x0020F300)
>>> diff --git a/arch/arm/include/asm/arch-exynos/cpu.h b/arch/arm/include/asm/arch-exynos/cpu.h
>>> index 2b44210..2c642ba 100644
>>> --- a/arch/arm/include/asm/arch-exynos/cpu.h
>>> +++ b/arch/arm/include/asm/arch-exynos/cpu.h
>>> @@ -53,6 +53,7 @@
>>> #define EXYNOS4_AUDIOSS_BASE DEVICE_NOT_AVAILABLE
>>> #define EXYNOS4_USB_HOST_XHCI_BASE DEVICE_NOT_AVAILABLE
>>> #define EXYNOS4_USB3PHY_BASE DEVICE_NOT_AVAILABLE
>>> +#define EXYNOS4_DMC_TZASC0_BASE DEVICE_NOT_AVAILABLE
>>>
>>> /* EXYNOS4X12 */
>>> #define EXYNOS4X12_GPIO_PART3_BASE 0x03860000
>>> @@ -91,6 +92,7 @@
>>> #define EXYNOS4X12_AUDIOSS_BASE DEVICE_NOT_AVAILABLE
>>> #define EXYNOS4X12_USB_HOST_XHCI_BASE DEVICE_NOT_AVAILABLE
>>> #define EXYNOS4X12_USB3PHY_BASE DEVICE_NOT_AVAILABLE
>>> +#define EXYNOS4X12_DMC_TZASC0_BASE DEVICE_NOT_AVAILABLE
>>>
>>> /* EXYNOS5 */
>>> #define EXYNOS5_I2C_SPACING 0x10000
>>> @@ -129,6 +131,7 @@
>>>
>>> #define EXYNOS5_ADC_BASE DEVICE_NOT_AVAILABLE
>>> #define EXYNOS5_MODEM_BASE DEVICE_NOT_AVAILABLE
>>> +#define EXYNOS5_DMC_TZASC0_BASE DEVICE_NOT_AVAILABLE
>>>
>>> /* EXYNOS5420 */
>>> #define EXYNOS5420_AUDIOSS_BASE 0x03810000
>>> @@ -284,6 +287,7 @@ SAMSUNG_BASE(spi_isp, SPI_ISP_BASE)
>>> SAMSUNG_BASE(tzpc, TZPC_BASE)
>>> SAMSUNG_BASE(dmc_ctrl, DMC_CTRL_BASE)
>>> SAMSUNG_BASE(dmc_phy, DMC_PHY_BASE)
>>> +SAMSUNG_BASE(dmc_tzasc0, DMC_TZASC0_BASE)
>>
>> then do we need to define two base addresses for TZASC?
>> you never use TZASC1.
> Acessing base address for TZASC1 in following manner. Hence added only
> SAMSUNG_BASE(dmc_tzasc0, DMC_TZASC0_BASE)
> "tzasc1 = (struct exynos5_tzasc *)(samsung_get_base_dmc_tzasc0()
> + DMC_OFFSET);"
Yes, so my suggestion is defining TZASC only.
#define EXYNOS5420_DMC_TZASC_BASE 0x10D40000
SAMSUNG_BASE(dmc_tzasc, DMC_TZASC_BASE)
>>
>>> SAMSUNG_BASE(audio_ass, AUDIOSS_BASE)
>>> #endif
>>>
Thanks,
Minkyu Kang.
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