[U-Boot] [RFC][PATCH 6/7] TI: OMAP3: Create common config files for TI OMAP3 platforms.

[Enric Balletbo i Serra]

Create a new file, include/configs/ti_omap3_common.h, for everything
common to the OMAP3 SoC leaving just the board specific part to board
configuration file.

Signed-off-by: Enric Balletbo i Serra <eballetbo at gmail.com>
---
 include/configs/ti_omap3_common.h | 73 +++++++++++++++++++++++++++++++++++++++
 1 file changed, 73 insertions(+)
 create mode 100644 include/configs/ti_omap3_common.h

diff --git a/include/configs/ti_omap3_common.h b/include/configs/ti_omap3_common.h
new file mode 100644
index 0000000..854cb78
--- /dev/null
+++ b/include/configs/ti_omap3_common.h
@@ -0,0 +1,73 @@
+/*
+ * ti_omap3_common.h
+ *
+ * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ *
+ * For more details, please see the technical documents listed at
+ *   http://www.ti.com/product/omap3530
+ *   http://www.ti.com/product/omap3630
+ *   http://www.ti.com/product/dm3730
+ */
+
+#ifndef __CONFIG_TI_OMAP3_COMMON_H__
+#define __CONFIG_TI_OMAP3_COMMON_H__
+
+#define CONFIG_OMAP34XX
+
+#include <asm/arch/cpu.h>
+#include <asm/arch/omap3.h>
+
+/* The chip has SDRC controller */
+#define CONFIG_SDRC
+
+/* Clock Defines */
+#define V_OSCK			26000000	/* Clock output from T2 */
+#define V_SCLK			(V_OSCK >> 1)
+
+/* NS16550 Configuration */
+#define V_NS16550_CLK			48000000	/* 48MHz (APLL96/2) */
+#define CONFIG_SYS_NS16550
+#define CONFIG_SYS_NS16550_SERIAL
+#define CONFIG_SYS_NS16550_REG_SIZE	(-4)
+#define CONFIG_SYS_NS16550_CLK		V_NS16550_CLK
+#define CONFIG_SYS_BAUDRATE_TABLE	{4800, 9600, 19200, 38400, 57600, \
+					115200}
+
+/* Select serial console configuration */
+#define CONFIG_CONS_INDEX		3
+#define CONFIG_SYS_NS16550_COM3		OMAP34XX_UART3
+#define CONFIG_SERIAL3			3
+
+/* Physical Memory Map */
+#define PHYS_SDRAM_1		OMAP34XX_SDRC_CS0
+#define PHYS_SDRAM_2		OMAP34XX_SDRC_CS1
+
+/*
+ * OMAP3 has 12 GP timers, they can be driven by the system clock
+ * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK).
+ * This rate is divided by a local divisor.
+ */
+#define CONFIG_SYS_TIMERBASE		(OMAP34XX_GPT2)
+
+#define CONFIG_SYS_MONITOR_LEN		(256 << 10)
+
+/* TWL4030 */
+#define CONFIG_TWL4030_POWER		1
+
+/* SPL */
+#define CONFIG_SPL_TEXT_BASE		0x40200800
+#define CONFIG_SPL_MAX_SIZE		(54 * 1024)
+#define CONFIG_SPL_LDSCRIPT		"$(CPUDIR)/omap-common/u-boot-spl.lds"
+#define CONFIG_SPL_POWER_SUPPORT
+
+#ifdef CONFIG_NAND
+#define CONFIG_SPL_NAND_SUPPORT
+#define CONFIG_SPL_NAND_SIMPLE
+#endif
+
+/* Now bring in the rest of the common code. */
+#include <configs/ti_armv7_common.h>
+
+#endif	/* __CONFIG_TI_OMAP3_COMMON_H__ */
-- 
1.8.1.2