[U-Boot] [PATCH v2 1/5] ARM: pxa: prevent PXA270 occasional reboot freezes
Sergei Ianovich
ynvich at gmail.com
Tue Dec 17 02:03:40 CET 2013
Erratum 71 of PXA270M Processor Family Specification Update
(April 19, 2010) explains that watchdog reset time is just
8us insead of 10ms in EMTS.
If SDRAM is not reset, it causes memory bus congestion and
the device hangs.
We put SDRAM in selfresh mode before watchdog reset, removing
potential freezes.
Signed-off-by: Sergei Ianovich <ynvich at gmail.com>
CC: Marek Vasut <marex at denx.de>
---
Changes v1..v2
* write to MDREFR once instead of in a cycle as suggested by
Marek Vasut
arch/arm/cpu/pxa/pxa2xx.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/cpu/pxa/pxa2xx.c b/arch/arm/cpu/pxa/pxa2xx.c
index c9a7d45..7e861e2 100644
--- a/arch/arm/cpu/pxa/pxa2xx.c
+++ b/arch/arm/cpu/pxa/pxa2xx.c
@@ -279,6 +279,7 @@ void reset_cpu(ulong ignored)
tmp = readl(OSCR);
tmp += 0x1000;
writel(tmp, OSMR3);
+ writel(MDREFR_SLFRSH, MDREFR);
for (;;)
;
--
1.8.5.1
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