[U-Boot] [PATCH v2 21/35] zynq: Add zynq_zc770 xm013 board support
Jagannadha Sutradharudu Teki
jagannadha.sutradharudu-teki at xilinx.com
Wed Dec 18 16:30:06 CET 2013
ZC770 is a complete development board based on the Xilinx Zynq-7000
All Programmable SoC, similar to ZC70x board but which has four
different daughter cards, like XM010, XM011, XM012 and XM013
ZC770 XM013:
- 1GB DDR3
- 128 Mb Quad-SPI Flash(dual parallel)
- USB-UART
Signed-off-by: Jagannadha Sutradharudu Teki <jaganna at xilinx.com>
---
V2: Updated domain name in mail ids'
boards.cfg | 1 +
include/configs/zynq_zc770.h | 6 ++++++
2 files changed, 7 insertions(+)
diff --git a/boards.cfg b/boards.cfg
index 11c7f9d..1687169 100644
--- a/boards.cfg
+++ b/boards.cfg
@@ -358,6 +358,7 @@ Active arm armv7 zynq xilinx zynq zynq_zc70x -
Active arm armv7 zynq xilinx zynq zynq_zed - Michal Simek <monstr at monstr.eu>:Jagannadha Sutradharudu Teki <jaganna at xilinx.com>
Active arm armv7 zynq xilinx zynq zynq_microzed - Michal Simek <monstr at monstr.eu>:Jagannadha Sutradharudu Teki <jaganna at xilinx.com>
Active arm armv7 zynq xilinx zynq zynq_zc770_xm010 zynq_zc770:ZC770_XM010 Michal Simek <monstr at monstr.eu>:Jagannadha Sutradharudu Teki <jaganna at xilinx.com>
+Active arm armv7 zynq xilinx zynq zynq_zc770_xm013 zynq_zc770:ZC770_XM013 Michal Simek <monstr at monstr.eu>:Jagannadha Sutradharudu Teki <jaganna at xilinx.com>
Active arm armv7:arm720t tegra114 nvidia dalmore dalmore - Tom Warren <twarren at nvidia.com>
Active arm armv7:arm720t tegra20 avionic-design medcom-wide medcom-wide - Thierry Reding <thierry.reding at avionic-design.de>
Active arm armv7:arm720t tegra20 avionic-design plutux plutux - Thierry Reding <thierry.reding at avionic-design.de>
diff --git a/include/configs/zynq_zc770.h b/include/configs/zynq_zc770.h
index f12f816..0dea101 100644
--- a/include/configs/zynq_zc770.h
+++ b/include/configs/zynq_zc770.h
@@ -21,6 +21,12 @@
# define CONFIG_ZYNQ_SDHCI0
# define CONFIG_ZYNQ_QSPI
+#elif defined(CONFIG_ZC770_XM013)
+# define CONFIG_ZYNQ_SERIAL_UART0
+# define CONFIG_ZYNQ_GEM1
+# define CONFIG_ZYNQ_GEM_PHY_ADDR1 7
+# define CONFIG_ZYNQ_QSPI
+
#else
# define CONFIG_ZYNQ_SERIAL_UART0
#endif
--
1.8.3
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