[U-Boot] [U-Boot, PATCHv2, 2/5] am437x_epos_evm: add SPL API, QSPI, and serial flash support

[Jagannadha Sutradharudu Teki]

From: "Poddar, Sourav" <sourav.poddar at ti.com>

Enables support for SPI SPL, QSPI and Spansion serial flash device
on the EVM. Configures pin muxes for QSPI mode.

Signed-off-by: Sourav Poddar <sourav.poddar at ti.com>
Reviewed-by: Jagannadha Sutradharudu Teki <jaganna at xilinx.com>
---
board/ti/am43xx/mux.c        |   11 +++++++++++
 include/configs/am43xx_evm.h |   20 ++++++++++++++++++++
 2 files changed, 31 insertions(+), 0 deletions(-)

diff --git a/board/ti/am43xx/mux.c b/board/ti/am43xx/mux.c
index 810b194..4db3d78 100644
--- a/board/ti/am43xx/mux.c
+++ b/board/ti/am43xx/mux.c
@@ -38,6 +38,16 @@ static struct module_pin_mux gpio0_22_pin_mux[] = {
 	{-1},
 };
 
+static struct module_pin_mux qspi_pin_mux[] = {
+	{OFFSET(gpmc_csn0), (MODE(3) | PULLUP_EN | RXACTIVE)}, /* QSPI_CS0 */
+	{OFFSET(gpmc_csn3), (MODE(2) | PULLUP_EN | RXACTIVE)}, /* QSPI_CLK */
+	{OFFSET(gpmc_advn_ale), (MODE(3) | PULLUP_EN | RXACTIVE)}, /* QSPI_D0 */
+	{OFFSET(gpmc_oen_ren), (MODE(3) | PULLUP_EN | RXACTIVE)}, /* QSPI_D1 */
+	{OFFSET(gpmc_wen), (MODE(3) | PULLUP_EN | RXACTIVE)}, /* QSPI_D2 */
+	{OFFSET(gpmc_be0n_cle), (MODE(3) | PULLUP_EN | RXACTIVE)}, /* QSPI_D3 */
+	{-1},
+};
+
 void enable_uart0_pin_mux(void)
 {
 	configure_module_pin_mux(uart0_pin_mux);
@@ -50,6 +60,7 @@ void enable_board_pin_mux(void)
 
 	if (board_is_gpevm())
 		configure_module_pin_mux(gpio0_22_pin_mux);
+	configure_module_pin_mux(qspi_pin_mux);
 }
 
 void enable_i2c0_pin_mux(void)
diff --git a/include/configs/am43xx_evm.h b/include/configs/am43xx_evm.h
index 4de495a..a81c586 100644
--- a/include/configs/am43xx_evm.h
+++ b/include/configs/am43xx_evm.h
@@ -79,6 +79,26 @@
 #define CONFIG_OMAP_USB_PHY
 #define CONFIG_AM437X_USB2PHY2_HOST
 
+/* SPI */
+#undef CONFIG_OMAP3_SPI
+#define CONFIG_TI_QSPI
+#define CONFIG_SPI_FLASH
+#define CONFIG_SPI_FLASH_MACRONIX
+#define CONFIG_CMD_SF
+#define CONFIG_CMD_SPI
+#define CONFIG_TI_SPI_MMAP
+#define CONFIG_QSPI_SEL_GPIO                   48
+#define CONFIG_SF_DEFAULT_SPEED                48000000
+#define CONFIG_DEFAULT_SPI_MODE                SPI_MODE_3
+
+/* SPI SPL */
+#define CONFIG_SPL_SPI_SUPPORT
+#define CONFIG_SPL_SPI_LOAD
+#define CONFIG_SPL_SPI_FLASH_SUPPORT
+#define CONFIG_SPL_SPI_BUS             0
+#define CONFIG_SPL_SPI_CS              0
+#define CONFIG_SYS_SPI_U_BOOT_OFFS     0x20000
+
 #ifndef CONFIG_SPL_BUILD
 #define CONFIG_EXTRA_ENV_SETTINGS \
 	"loadaddr=0x80200000\0" \