[U-Boot] [PATCH] net/designware: make driver compatible with data cache

[Mischa Jonker]

Hi Alexey,

>  * Implement all accesses to shared structures between CPU and GMAC via
> uncached reads/writes ("readl"/"writel").

I don't know how ARC exactly implements this for u-boot, but AFAIK, readl/writel are meant for 'strongly ordered' I/O writes, not necessarily uncached. The uncached part of it us usually achieved by mapping it into an uncached area, but this is not always possible without using the MMU. So you may need to allocate descriptors on cache-line boundaries and do manually flushing/invalidating.

Mischa