[U-Boot] [PATCH] mx6: Disable Power Down Bit of watchdog

[Otavio Salvador]

On Thu, Feb 7, 2013 at 2:07 PM, Fabio Estevam <festevam at gmail.com> wrote:
> On Thu, Feb 7, 2013 at 12:39 PM, Otavio Salvador
> <otavio at ossystems.com.br> wrote:
>> On Thu, Feb 7, 2013 at 12:28 PM, Fabio Estevam
>> <fabio.estevam at freescale.com> wrote:
>>> On a mx6qsabresd revision C board with rev1.2 mx6q, the system gets resetted and it is not able
>>> to reach the Linux prompt.
>>>
>>> Clearing the PDE - Power Down Enable bit fixes the problem.
>>>
>>> Signed-off-by: Fabio Estevam <fabio.estevam at freescale.com>
>>
>> What is not clear to me is why this affects only revision C of the
>> board. Is it clear for you?
>
> Yes, I investigated this further and I see that on mx6qsabresd revB
> the watchdog does not cut power to the mx6.
>
> For example:
>
> - On mx6qsabresd revB:
>
> U-Boot > reset
> resetting ...
>
>
> U-Boot 2013.01-10524-g432a3aa-dirty (Feb 07 2013 - 13:34:46)
>
> CPU:   Freescale i.MX6Q rev1.1 at 792 MHz
> Reset cause: WDOG
> Board: MX6Q-SabreSD
> DRAM:  1 GiB
> MMC:   FSL_SDHC: 0, FSL_SDHC: 1, FSL_SDHC: 2
> *** Warning - bad CRC, using default environment
> In:    serial
> Out:   serial
> Err:   serial
> Net:   FEC [PRIME]
> Warning: FEC using MAC address from net device
>
> Hit any key to stop autoboot:  0
> U-Boot >
>
> - On mx6qsabresd revC:
>
> U-Boot > reset
> resetting ...
>
>
> U-Boot 2013.01-10524-g432a3aa-dirty (Feb 07 2013 - 13:34:46)
>
> CPU:   Freescale i.MX6Q rev1.1 at 792 MHz
> Reset cause: POR
> Board: MX6Q-SabreSD
> DRAM:  1 GiB
> MMC:   FSL_SDHC: 0, FSL_SDHC: 1, FSL_SDHC: 2
> *** Warning - bad CRC, using default environment
> In:    serial
> Out:   serial
> Err:   serial
> Net:   FEC [PRIME]
> Warning: FEC using MAC address from net device
>
> Hit any key to stop autoboot:  0
> U-Boot >
>
> So the watchdog reset happens on both revisions, but only on revC it
> causes a POR due to its POR/watchdog circuitry.
>
> So in order to fix this:
>
> 1. We can always clear Power Down Enable (PDE) bit as I did on this
> patch and how it is done on FSL U-boot.
>
> 2. Check the board revision and only clear (PDE) for revC board.
>
> I would prefer number 1. as if someone copies the schematics of a revC
> board, but does not burn the fuses to indicate that their hardware
> behaves as a mx6qsabresd revC, then the reset problem will occur on
> their own board.
>
> I can also improve the commit log of the original patch to provide more details.

Yes; I think an improved commit log would be handy.

-- 
Otavio Salvador                             O.S. Systems
E-mail: otavio at ossystems.com.br  http://www.ossystems.com.br
Mobile: +55 53 9981-7854              http://projetos.ossystems.com.br