[U-Boot] [PATCH] mx6: Fix calculation of emi_slow clock rate

[Dirk Behme]

On 04.07.2013 13:27, Andrew Gabbasov wrote:
> This is porting of Freescale's patch from version imx_v2009.08_3.0.35_4.0.0,
> that fixes the obvious mistype of bits offset macro name (ACLK_EMI_PODF_OFFSET
> was used instead of ACLK_EMI_SLOW_PODF_OFFSET).
>
> Using the occasion, change the variable name 'emi_slow_pof' to more consistent
> 'emi_slow_podf'.
>
> Signed-off-by: Jason Liu <r64343 at freescale.com>
> Signed-off-by: Andrew Gabbasov <andrew_gabbasov at mentor.com>

Acked-by: Dirk Behme <dirk.behme at de.bosch.com>

Thanks

Dirk

> ---
>   arch/arm/cpu/armv7/mx6/clock.c |    8 ++++----
>   1 file changed, 4 insertions(+), 4 deletions(-)
>
> diff --git a/arch/arm/cpu/armv7/mx6/clock.c b/arch/arm/cpu/armv7/mx6/clock.c
> index 3c0d908..064f8c8 100644
> --- a/arch/arm/cpu/armv7/mx6/clock.c
> +++ b/arch/arm/cpu/armv7/mx6/clock.c
> @@ -244,13 +244,13 @@ static u32 get_axi_clk(void)
>
>   static u32 get_emi_slow_clk(void)
>   {
> -	u32 emi_clk_sel, emi_slow_pof, cscmr1, root_freq = 0;
> +	u32 emi_clk_sel, emi_slow_podf, cscmr1, root_freq = 0;
>
>   	cscmr1 =  __raw_readl(&imx_ccm->cscmr1);
>   	emi_clk_sel = cscmr1 & MXC_CCM_CSCMR1_ACLK_EMI_SLOW_MASK;
>   	emi_clk_sel >>= MXC_CCM_CSCMR1_ACLK_EMI_SLOW_OFFSET;
> -	emi_slow_pof = cscmr1 & MXC_CCM_CSCMR1_ACLK_EMI_SLOW_PODF_MASK;
> -	emi_slow_pof >>= MXC_CCM_CSCMR1_ACLK_EMI_PODF_OFFSET;
> +	emi_slow_podf = cscmr1 & MXC_CCM_CSCMR1_ACLK_EMI_SLOW_PODF_MASK;
> +	emi_slow_podf >>= MXC_CCM_CSCMR1_ACLK_EMI_SLOW_PODF_OFFSET;
>
>   	switch (emi_clk_sel) {
>   	case 0:
> @@ -267,7 +267,7 @@ static u32 get_emi_slow_clk(void)
>   		break;
>   	}
>
> -	return root_freq / (emi_slow_pof + 1);
> +	return root_freq / (emi_slow_podf + 1);
>   }
>
>   #ifdef CONFIG_MX6SL
>