[U-Boot] [PATCH 1/2] ARM: tegra: Make cache line size SoC specific

Stephen Warren swarren at wwwdotorg.org
Thu Jul 18 23:19:18 CEST 2013


On 07/18/2013 01:13 PM, Thierry Reding wrote:
> From: Thierry Reding <treding at nvidia.com>
> 
> Currently all Tegra SoCs are assumed to have 32 byte cache lines. This
> isn't true for Tegra114, however, which uses 4 Cortex-A15 cores and
> therefore uses a cache line size of 64 bytes. Move the cache line size
> setting to the per-SoC common configuration file.

Tested-by: Stephen Warren <swarren at nvidia.com>
Reviewed-by: Stephen Warren <swarren at nvidia.com>


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