[U-Boot] [PATCH] net, phy, cpsw: fix gigabit register access

[Joe Hershberger]

On Tue, Jul 23, 2013 at 8:32 AM, Heiko Schocher <hs at denx.de> wrote:
> accessing a lan9303 switch with the cpsw driver results in wrong
> speed detection, as the switch sets the BMSR_ERCAP in BMSR
> register, and follow read of the MII_STAT1000 register fails, as
> the switch does not support it. Current code did not check,
> if a phy_read() fails ... fix this.
>
> Signed-off-by: Heiko Schocher <hs at denx.de>
> Cc: Joe Hershberger <joe.hershberger at gmail.com>
> ---
>  drivers/net/cpsw.c    | 2 +-
>  drivers/net/phy/phy.c | 6 +++++-
>  2 Dateien geändert, 6 Zeilen hinzugefügt(+), 2 Zeilen entfernt(-)
>
> diff --git a/drivers/net/cpsw.c b/drivers/net/cpsw.c
> index 379b679..52c08ed 100644
> --- a/drivers/net/cpsw.c
> +++ b/drivers/net/cpsw.c
> @@ -489,7 +489,7 @@ static inline void wait_for_idle(void)
>  static int cpsw_mdio_read(struct mii_dev *bus, int phy_id,
>                                 int dev_addr, int phy_reg)
>  {
> -       unsigned short data;
> +       int data;

How is this change related to the substance of the patch?

>         u32 reg;
>
>         if (phy_reg & ~PHY_REG_MASK || phy_id & ~PHY_ID_MASK)

Seems OK otherwise.

-Joe