[U-Boot] [PATCH] net, phy, cpsw: fix gigabit register access
Heiko Schocher
hs at denx.de
Tue Jul 23 15:32:36 CEST 2013
accessing a lan9303 switch with the cpsw driver results in wrong
speed detection, as the switch sets the BMSR_ERCAP in BMSR
register, and follow read of the MII_STAT1000 register fails, as
the switch does not support it. Current code did not check,
if a phy_read() fails ... fix this.
Signed-off-by: Heiko Schocher <hs at denx.de>
Cc: Joe Hershberger <joe.hershberger at gmail.com>
---
drivers/net/cpsw.c | 2 +-
drivers/net/phy/phy.c | 6 +++++-
2 Dateien geändert, 6 Zeilen hinzugefügt(+), 2 Zeilen entfernt(-)
diff --git a/drivers/net/cpsw.c b/drivers/net/cpsw.c
index 379b679..52c08ed 100644
--- a/drivers/net/cpsw.c
+++ b/drivers/net/cpsw.c
@@ -489,7 +489,7 @@ static inline void wait_for_idle(void)
static int cpsw_mdio_read(struct mii_dev *bus, int phy_id,
int dev_addr, int phy_reg)
{
- unsigned short data;
+ int data;
u32 reg;
if (phy_reg & ~PHY_REG_MASK || phy_id & ~PHY_ID_MASK)
diff --git a/drivers/net/phy/phy.c b/drivers/net/phy/phy.c
index effe3e3..2fdccb8 100644
--- a/drivers/net/phy/phy.c
+++ b/drivers/net/phy/phy.c
@@ -291,7 +291,7 @@ int genphy_parse_link(struct phy_device *phydev)
/* We're using autonegotiation */
if (mii_reg & BMSR_ANEGCAPABLE) {
u32 lpa = 0;
- u32 gblpa = 0;
+ int gblpa = 0;
u32 estatus = 0;
/* Check for gigabit capability */
@@ -300,6 +300,10 @@ int genphy_parse_link(struct phy_device *phydev)
* both PHYs in the link
*/
gblpa = phy_read(phydev, MDIO_DEVAD_NONE, MII_STAT1000);
+ if (gblpa < 0) {
+ debug("Could not read MII_STAT1000. Ignoring gigabit capability\n");
+ gblpa = 0;
+ }
gblpa &= phy_read(phydev,
MDIO_DEVAD_NONE, MII_CTRL1000) << 2;
}
--
1.7.11.7
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