[U-Boot] arm, am33xx: move uart soft reset code to common place
Heiko Schocher
hs at denx.de
Tue Jun 4 11:00:57 CEST 2013
move uart soft reset code to common place and call
this function from board code, instead of copy and paste
this code for every board.
Signed-off-by: Heiko Schocher <hs at denx.de>
Cc: Matt Porter <mporter at ti.com>
Cc: Lars Poeschel <poeschel at lemonage.de>
Cc: Tom Rini <trini at ti.com>
Cc: Enric Balletbo i Serra <eballetbo at iseebcn.com>
---
arch/arm/cpu/armv7/am33xx/board.c | 22 ++++++++++++++++++++++
arch/arm/include/asm/arch-am33xx/sys_proto.h | 1 +
board/isee/igep0033/board.c | 22 +---------------------
board/phytec/pcm051/board.c | 20 +-------------------
board/ti/am335x/board.c | 23 +----------------------
board/ti/ti814x/evm.c | 19 +------------------
6 Dateien geändert, 27 Zeilen hinzugefügt(+), 80 Zeilen entfernt(-)
diff --git a/arch/arm/cpu/armv7/am33xx/board.c b/arch/arm/cpu/armv7/am33xx/board.c
index d3b3612..b935a29 100644
--- a/arch/arm/cpu/armv7/am33xx/board.c
+++ b/arch/arm/cpu/armv7/am33xx/board.c
@@ -166,4 +166,26 @@ void rtc32k_enable(void)
/* Enable the RTC 32K OSC by setting bits 3 and 6. */
writel((1 << 3) | (1 << 6), &rtc->osc);
}
+
+#define UART_RESET (0x1 << 1)
+#define UART_CLK_RUNNING_MASK 0x1
+#define UART_SMART_IDLE_EN (0x1 << 0x3)
+
+void uart_soft_reset(void)
+{
+ struct uart_sys *uart_base = (struct uart_sys *)DEFAULT_UART_BASE;
+ u32 regval;
+
+ regval = readl(&uart_base->uartsyscfg);
+ regval |= UART_RESET;
+ writel(regval, &uart_base->uartsyscfg);
+ while ((readl(&uart_base->uartsyssts) &
+ UART_CLK_RUNNING_MASK) != UART_CLK_RUNNING_MASK)
+ ;
+
+ /* Disable smart idle */
+ regval = readl(&uart_base->uartsyscfg);
+ regval |= UART_SMART_IDLE_EN;
+ writel(regval, &uart_base->uartsyscfg);
+}
#endif
diff --git a/arch/arm/include/asm/arch-am33xx/sys_proto.h b/arch/arm/include/asm/arch-am33xx/sys_proto.h
index 71a1677..2422924 100644
--- a/arch/arm/include/asm/arch-am33xx/sys_proto.h
+++ b/arch/arm/include/asm/arch-am33xx/sys_proto.h
@@ -43,5 +43,6 @@ void omap_nand_switch_ecc(uint32_t, uint32_t);
#ifdef CONFIG_SPL_BUILD
void rtc32k_enable(void);
+void uart_soft_reset(void);
#endif
#endif
diff --git a/board/isee/igep0033/board.c b/board/isee/igep0033/board.c
index e82d722..842051f 100644
--- a/board/isee/igep0033/board.c
+++ b/board/isee/igep0033/board.c
@@ -36,21 +36,12 @@
DECLARE_GLOBAL_DATA_PTR;
static struct wd_timer *wdtimer = (struct wd_timer *)WDT_BASE;
-#ifdef CONFIG_SPL_BUILD
-static struct uart_sys *uart_base = (struct uart_sys *)DEFAULT_UART_BASE;
-#endif
/* MII mode defines */
#define RMII_MODE_ENABLE 0x4D
static struct ctrl_dev *cdev = (struct ctrl_dev *)CTRL_DEVICE_BASE;
-/* UART Defines */
-#ifdef CONFIG_SPL_BUILD
-#define UART_RESET (0x1 << 1)
-#define UART_CLK_RUNNING_MASK 0x1
-#define UART_SMART_IDLE_EN (0x1 << 0x3)
-
static const struct ddr_data ddr3_data = {
.datardsratio0 = K4B2G1646EBIH9_RD_DQS,
.datawdsratio0 = K4B2G1646EBIH9_WR_DQS,
@@ -111,18 +102,7 @@ void s_init(void)
enable_uart0_pin_mux();
- regval = readl(&uart_base->uartsyscfg);
- regval |= UART_RESET;
- writel(regval, &uart_base->uartsyscfg);
- while ((readl(&uart_base->uartsyssts) &
- UART_CLK_RUNNING_MASK) != UART_CLK_RUNNING_MASK)
- ;
-
- /* Disable smart idle */
- regval = readl(&uart_base->uartsyscfg);
- regval |= UART_SMART_IDLE_EN;
- writel(regval, &uart_base->uartsyscfg);
-
+ uart_soft_reset();
gd = &gdata;
preloader_console_init();
diff --git a/board/phytec/pcm051/board.c b/board/phytec/pcm051/board.c
index 6c0993a..72c5612 100644
--- a/board/phytec/pcm051/board.c
+++ b/board/phytec/pcm051/board.c
@@ -39,9 +39,6 @@
DECLARE_GLOBAL_DATA_PTR;
static struct wd_timer *wdtimer = (struct wd_timer *)WDT_BASE;
-#ifdef CONFIG_SPL_BUILD
-static struct uart_sys *uart_base = (struct uart_sys *)DEFAULT_UART_BASE;
-#endif
/* MII mode defines */
#define MII_MODE_ENABLE 0x0
@@ -50,11 +47,7 @@ static struct uart_sys *uart_base = (struct uart_sys *)DEFAULT_UART_BASE;
static struct ctrl_dev *cdev = (struct ctrl_dev *)CTRL_DEVICE_BASE;
-/* UART defines */
#ifdef CONFIG_SPL_BUILD
-#define UART_RESET (0x1 << 1)
-#define UART_CLK_RUNNING_MASK 0x1
-#define UART_SMART_IDLE_EN (0x1 << 0x3)
/* DDR RAM defines */
#define DDR_CLK_MHZ 303 /* DDR_DPLL_MULT value */
@@ -120,18 +113,7 @@ void s_init(void)
u32 regval;
enable_uart0_pin_mux();
-
- regval = readl(&uart_base->uartsyscfg);
- regval |= UART_RESET;
- writel(regval, &uart_base->uartsyscfg);
- while ((readl(&uart_base->uartsyssts) & UART_CLK_RUNNING_MASK)
- != UART_CLK_RUNNING_MASK)
- ;
-
- /* Disable smart idle */
- regval = readl(&uart_base->uartsyscfg);
- regval |= UART_SMART_IDLE_EN;
- writel(regval, &uart_base->uartsyscfg);
+ uart_soft_reset();
gd = &gdata;
diff --git a/board/ti/am335x/board.c b/board/ti/am335x/board.c
index bf25878..b04e385 100644
--- a/board/ti/am335x/board.c
+++ b/board/ti/am335x/board.c
@@ -38,9 +38,6 @@
DECLARE_GLOBAL_DATA_PTR;
static struct wd_timer *wdtimer = (struct wd_timer *)WDT_BASE;
-#ifdef CONFIG_SPL_BUILD
-static struct uart_sys *uart_base = (struct uart_sys *)DEFAULT_UART_BASE;
-#endif
/* MII mode defines */
#define MII_MODE_ENABLE 0x0
@@ -126,12 +123,7 @@ static int read_eeprom(void)
return 0;
}
-/* UART Defines */
#ifdef CONFIG_SPL_BUILD
-#define UART_RESET (0x1 << 1)
-#define UART_CLK_RUNNING_MASK 0x1
-#define UART_SMART_IDLE_EN (0x1 << 0x3)
-
static const struct ddr_data ddr2_data = {
.datardsratio0 = ((MT47H128M16RT25E_RD_DQS<<30) |
(MT47H128M16RT25E_RD_DQS<<20) |
@@ -305,9 +297,6 @@ void s_init(void)
/* Enable RTC32K clock */
rtc32k_enable();
- /* UART softreset */
- u32 regVal;
-
#ifdef CONFIG_SERIAL1
enable_uart0_pin_mux();
#endif /* CONFIG_SERIAL1 */
@@ -327,17 +316,7 @@ void s_init(void)
enable_uart5_pin_mux();
#endif /* CONFIG_SERIAL6 */
- regVal = readl(&uart_base->uartsyscfg);
- regVal |= UART_RESET;
- writel(regVal, &uart_base->uartsyscfg);
- while ((readl(&uart_base->uartsyssts) &
- UART_CLK_RUNNING_MASK) != UART_CLK_RUNNING_MASK)
- ;
-
- /* Disable smart idle */
- regVal = readl(&uart_base->uartsyscfg);
- regVal |= UART_SMART_IDLE_EN;
- writel(regVal, &uart_base->uartsyscfg);
+ uart_soft_reset();
gd = &gdata;
diff --git a/board/ti/ti814x/evm.c b/board/ti/ti814x/evm.c
index 0049c4b..661921a 100644
--- a/board/ti/ti814x/evm.c
+++ b/board/ti/ti814x/evm.c
@@ -37,33 +37,16 @@ DECLARE_GLOBAL_DATA_PTR;
#ifdef CONFIG_SPL_BUILD
static struct wd_timer *wdtimer = (struct wd_timer *)WDT_BASE;
-static struct uart_sys *uart_base = (struct uart_sys *)DEFAULT_UART_BASE;
#endif
static struct ctrl_dev *cdev = (struct ctrl_dev *)CTRL_DEVICE_BASE;
/* UART Defines */
#ifdef CONFIG_SPL_BUILD
-#define UART_RESET (0x1 << 1)
-#define UART_CLK_RUNNING_MASK 0x1
-#define UART_SMART_IDLE_EN (0x1 << 0x3)
-
static void uart_enable(void)
{
- u32 regVal;
-
/* UART softreset */
- regVal = readl(&uart_base->uartsyscfg);
- regVal |= UART_RESET;
- writel(regVal, &uart_base->uartsyscfg);
- while ((readl(&uart_base->uartsyssts) &
- UART_CLK_RUNNING_MASK) != UART_CLK_RUNNING_MASK)
- ;
-
- /* Disable smart idle */
- regVal = readl(&uart_base->uartsyscfg);
- regVal |= UART_SMART_IDLE_EN;
- writel(regVal, &uart_base->uartsyscfg);
+ uart_soft_reset();
}
static void wdt_disable(void)
--
1.7.11.7
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