[U-Boot] [PATCH v7] Add support for Congatec Conga-QEVAl board
Stefano Babic
sbabic at denx.de
Tue Jun 4 11:43:22 CEST 2013
Hi Leo,
On 04/06/2013 11:30, SARTRE Leo wrote:
> Add minimal support (only boot from mmc device) for the Congatec
> Conga-QEVAl Evaluation Carrier Board with conga-Qmx6q (i.MX6 Quad
> processor) module.
>
> Signed-off-by: Leo Sartre <lsartre at adeneo-embedded.com>
> ---
>
> Changes in v7:
> -cgtqmx6eval.c : remove unused code in board_init.
>
> MAINTAINERS | 4 +
> board/congatec/cgtqmx6eval/Makefile | 42 +++++++
> board/congatec/cgtqmx6eval/README | 29 +++++
> board/congatec/cgtqmx6eval/cgtqmx6eval.c | 167 ++++++++++++++++++++++++++
> boards.cfg | 1 +
> include/configs/cgtqmx6eval.h | 192 ++++++++++++++++++++++++++++++
> 6 files changed, 435 insertions(+)
> create mode 100644 board/congatec/cgtqmx6eval/Makefile
> create mode 100644 board/congatec/cgtqmx6eval/README
> create mode 100644 board/congatec/cgtqmx6eval/cgtqmx6eval.c
> create mode 100644 include/configs/cgtqmx6eval.h
>
> diff --git a/MAINTAINERS b/MAINTAINERS
> index 14075af..d803293 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -897,6 +897,10 @@ Steve Sakoman <sakoman at gmail.com>
>
> omap3_overo ARM ARMV7 (OMAP3xx SoC)
>
> +Leo Sartre <lsartre at adeneo-embedded.com>
> +
> + cgtqmx6qeval i.MX6Q
> +
> Jens Scharsig <esw at bus-elektronik.de>
>
> eb_cpux9k2 ARM920T (AT91RM9200 SoC)
> diff --git a/board/congatec/cgtqmx6eval/Makefile b/board/congatec/cgtqmx6eval/Makefile
> new file mode 100644
> index 0000000..ac16c1f
> --- /dev/null
> +++ b/board/congatec/cgtqmx6eval/Makefile
> @@ -0,0 +1,42 @@
> +#
> +# Copyright (C) 2007, Guennadi Liakhovetski <lg at denx.de>
> +#
> +# (C) Copyright 2011 Freescale Semiconductor, Inc.
> +# (C) Copyright 2013 Adeneo Embedded <www.adeneo-embedded.com>
> +#
> +# This program is free software; you can redistribute it and/or
> +# modify it under the terms of the GNU General Public License as
> +# published by the Free Software Foundation; either version 2 of
> +# the License, or (at your option) any later version.
> +#
> +# This program is distributed in the hope that it will be useful,
> +# but WITHOUT ANY WARRANTY; without even the implied warranty of
> +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> +# GNU General Public License for more details.
> +#
> +# You should have received a copy of the GNU General Public License
> +# along with this program; if not, write to the Free Software
> +# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
> +# MA 02111-1307 USA
> +#
> +
> +include $(TOPDIR)/config.mk
> +
> +LIB = $(obj)lib$(BOARD).o
> +
> +COBJS := cgtqmx6eval.o
> +
> +SRCS := $(COBJS:.o=.c)
> +OBJS := $(addprefix $(obj),$(COBJS))
> +
> +$(LIB): $(obj).depend $(OBJS)
> + $(call cmd_link_o_target, $(OBJS))
> +
> +#########################################################################
> +
> +# defines $(obj).depend target
> +include $(SRCTREE)/rules.mk
> +
> +sinclude $(obj).depend
> +
> +#########################################################################
> diff --git a/board/congatec/cgtqmx6eval/README b/board/congatec/cgtqmx6eval/README
> new file mode 100644
> index 0000000..bbf0f75
> --- /dev/null
> +++ b/board/congatec/cgtqmx6eval/README
> @@ -0,0 +1,29 @@
> +U-Boot for the Congatec Conga-QEVAl Evaluation Carrier board with
> +qmx6 quad module.
> +
> +This file contains information for the port of U-Boot to the Congatec
> +Conga-QEVAl Evaluation Carrier board with qmx6 quad module.
> +
> +1. Boot source, boot from SD card
> +---------------------------------
> +
> +This version of u-boot works only on the SD card. By default, the
> +Congatec board can boot only from the SPI-NOR.
> +But, with the u-boot version provided with the board you can write boot
> +registers to force the board to reboot and boot from the SD slot. If
> +"bmode" command is not available from your pre-installed u-boot, these
> +instruction will produce the same effect:
> +
> +conga-QMX6 U-Boot > mw.l 0x20d8040 0x3850
> +conga-QMX6 U-Boot > mw.l 0x020d8044 0x10000000
> +conga-QMX6 U-Boot > reset
> +resetting ...
> +
> +The the board will reboot and, if you have written your SD correctly
> +the board will use u-boot that live into the SD
> +
> +To copy the resulting u-boot.imx to the SD card:
> +
> + dd if=u-boot.imx of=/dev/xxx bs=512 seek=2
> +
> +Note: Replace xxx with the device representing the SD card in your system.
> diff --git a/board/congatec/cgtqmx6eval/cgtqmx6eval.c b/board/congatec/cgtqmx6eval/cgtqmx6eval.c
> new file mode 100644
> index 0000000..20a004f
> --- /dev/null
> +++ b/board/congatec/cgtqmx6eval/cgtqmx6eval.c
> @@ -0,0 +1,167 @@
> +/*
> + * Copyright (C) 2010-2011 Freescale Semiconductor, Inc.
> + * Based on mx6qsabrelite.c file
> + * Copyright (C) 2013, Adeneo Embedded <www.adeneo-embedded.com>
> + * Leo Sartre, <lsartre at adeneo-embedded.com>
> + *
> + * This program is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU General Public License as
> + * published by the Free Software Foundation; either version 2 of
> + * the License, or (at your option) any later version.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> + * GNU General Public License for more details.
> + *
> + * You should have received a copy of the GNU General Public License
> + * along with this program; if not, write to the Free Software
> + * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
> + * MA 02111-1307 USA
> + */
> +
> +#include <common.h>
> +#include <asm/io.h>
> +#include <asm/arch/clock.h>
> +#include <asm/arch/imx-regs.h>
> +#include <asm/arch/iomux.h>
> +#include <asm/arch/mx6-pins.h>
> +#include <asm/gpio.h>
> +#include <asm/imx-common/iomux-v3.h>
> +#include <asm/imx-common/boot_mode.h>
> +#include <mmc.h>
> +#include <fsl_esdhc.h>
> +
> +DECLARE_GLOBAL_DATA_PTR;
> +
> +#define UART_PAD_CTRL (PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED |\
> + PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST | PAD_CTL_HYS)
> +
> +#define USDHC_PAD_CTRL (PAD_CTL_PUS_47K_UP | PAD_CTL_SPEED_LOW |\
> + PAD_CTL_DSE_80ohm | PAD_CTL_SRE_FAST | PAD_CTL_HYS)
> +
> +int dram_init(void)
> +{
> + gd->ram_size = get_ram_size((void *)PHYS_SDRAM, PHYS_SDRAM_SIZE);
> +
> + return 0;
> +}
> +
> +iomux_v3_cfg_t const uart2_pads[] = {
> + MX6_PAD_EIM_D26__UART2_TXD | MUX_PAD_CTRL(UART_PAD_CTRL),
> + MX6_PAD_EIM_D27__UART2_RXD | MUX_PAD_CTRL(UART_PAD_CTRL),
> +};
> +
> +iomux_v3_cfg_t const usdhc2_pads[] = {
> + MX6_PAD_SD2_CLK__USDHC2_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL),
> + MX6_PAD_SD2_CMD__USDHC2_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL),
> + MX6_PAD_SD2_DAT0__USDHC2_DAT0 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
> + MX6_PAD_SD2_DAT1__USDHC2_DAT1 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
> + MX6_PAD_SD2_DAT2__USDHC2_DAT2 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
> + MX6_PAD_SD2_DAT3__USDHC2_DAT3 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
> + MX6_PAD_GPIO_4__GPIO_1_4 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
> +};
> +
> +iomux_v3_cfg_t const usdhc4_pads[] = {
> + MX6_PAD_SD4_CLK__USDHC4_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL),
> + MX6_PAD_SD4_CMD__USDHC4_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL),
> + MX6_PAD_SD4_DAT0__USDHC4_DAT0 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
> + MX6_PAD_SD4_DAT1__USDHC4_DAT1 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
> + MX6_PAD_SD4_DAT2__USDHC4_DAT2 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
> + MX6_PAD_SD4_DAT3__USDHC4_DAT3 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
> + MX6_PAD_SD4_DAT4__USDHC4_DAT4 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
> + MX6_PAD_SD4_DAT5__USDHC4_DAT5 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
> + MX6_PAD_SD4_DAT6__USDHC4_DAT6 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
> + MX6_PAD_SD4_DAT7__USDHC4_DAT7 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
> + MX6_PAD_NANDF_D6__GPIO_2_6 | MUX_PAD_CTRL(NO_PAD_CTRL), /* CD */
> +};
> +
> +static void setup_iomux_uart(void)
> +{
> + imx_iomux_v3_setup_multiple_pads(uart2_pads, ARRAY_SIZE(uart2_pads));
> +}
> +
> +#ifdef CONFIG_FSL_ESDHC
> +struct fsl_esdhc_cfg usdhc_cfg[] = {
> + {USDHC2_BASE_ADDR},
> + {USDHC4_BASE_ADDR},
> +};
> +
> +int board_mmc_getcd(struct mmc *mmc)
> +{
> + struct fsl_esdhc_cfg *cfg = (struct fsl_esdhc_cfg *)mmc->priv;
> + int ret;
> +
> + switch (cfg->esdhc_base) {
> + case USDHC2_BASE_ADDR:
> + gpio_direction_input(IMX_GPIO_NR(1, 4));
> + ret = !gpio_get_value(IMX_GPIO_NR(1, 4));
> + break;
> + case USDHC4_BASE_ADDR:
> + gpio_direction_input(IMX_GPIO_NR(2, 6));
> + ret = !gpio_get_value(IMX_GPIO_NR(2, 6));
> + break;
> + default:
> + printf("Bad USDHC interface\n");
> + }
> +
> + return ret;
> +}
> +
> +int board_mmc_init(bd_t *bis)
> +{
> + s32 status = 0;
> +
> + usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC2_CLK);
> + usdhc_cfg[1].sdhc_clk = mxc_get_clock(MXC_ESDHC4_CLK);
> +
> + imx_iomux_v3_setup_multiple_pads(
> + usdhc2_pads, ARRAY_SIZE(usdhc2_pads));
> + imx_iomux_v3_setup_multiple_pads(
> + usdhc4_pads, ARRAY_SIZE(usdhc4_pads));
> +
> + status = fsl_esdhc_initialize(bis, &usdhc_cfg[0]) |
> + fsl_esdhc_initialize(bis, &usdhc_cfg[1]);
> +
> + return status;
> +}
> +#endif
> +
> +int board_early_init_f(void)
> +{
> + setup_iomux_uart();
> +
> + return 0;
> +}
> +
> +int board_init(void)
> +{
> + /* address of boot parameters */
> + gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
> +
> + return 0;
> +}
> +
> +int checkboard(void)
> +{
> + puts("Board: Conga-QEVAL QMX6 Quad\n");
> +
> + return 0;
> +}
> +
> +#ifdef CONFIG_CMD_BMODE
> +static const struct boot_mode board_boot_modes[] = {
> + /* 4 bit bus width */
> + {"mmc0", MAKE_CFGVAL(0x50, 0x20, 0x00, 0x00)},
> + {"mmc1", MAKE_CFGVAL(0x50, 0x38, 0x00, 0x00)},
> + {NULL, 0},
> +};
> +#endif
> +
> +int misc_init_r(void)
> +{
> +#ifdef CONFIG_CMD_BMODE
> + add_board_boot_modes(board_boot_modes);
> +#endif
> + return 0;
> +}
> diff --git a/boards.cfg b/boards.cfg
> index e2a8d42..31755ef 100644
> --- a/boards.cfg
> +++ b/boards.cfg
> @@ -272,6 +272,7 @@ mx6qsabrelite arm armv7 mx6qsabrelite freesca
> mx6qsabresd arm armv7 mx6qsabresd freescale mx6 mx6qsabresd:IMX_CONFIG=board/freescale/imx/ddr/mx6q_4x_mt41j128.cfg
> mx6slevk arm armv7 mx6slevk freescale mx6 mx6slevk:IMX_CONFIG=board/freescale/mx6slevk/imximage.cfg,MX6SL
> titanium arm armv7 titanium freescale mx6 titanium:IMX_CONFIG=board/freescale/titanium/imximage.cfg
> +cgtqmx6qeval arm armv7 cgtqmx6eval congatec mx6 cgtqmx6eval:IMX_CONFIG=board/freescale/imx/ddr/mx6q_4x_mt41j128.cfg,MX6Q
Entries must be sorted - your board should be the first one for mx6. You
do not need to post a new version for that, I will order the list by
merging.
Apart of that:
Acked-by: Stefano Babic <sbabic at denx.de>
Best regards,
Stefano Babic
--
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