[U-Boot] [PATCH v3 08/17] sf: Add bank addr code in CONFIG_SPI_FLASH_BAR

Jagannadha Sutradharudu Teki jagannadha.sutradharudu-teki at xilinx.com
Tue Jun 11 21:23:13 CEST 2013


Defined bank addr code on CONFIG_SPI_FLASH_BAR macro, to reduce the
size for existing boards which has < 16Mbytes SPI flashes.

It's upto user which has provision to use the bank addr code for
flashes which has > 16Mbytes.

Signed-off-by: Jagannadha Sutradharudu Teki <jaganna at xilinx.com>
---
Changes for v3:
	- none
Changes for v2:
	- none

 README                               |  5 +++++
 drivers/mtd/spi/spi_flash.c          | 41 ++++++++++++++++++++++--------------
 drivers/mtd/spi/spi_flash_internal.h | 14 ++++++------
 include/spi_flash.h                  |  3 ++-
 4 files changed, 40 insertions(+), 23 deletions(-)

diff --git a/README b/README
index 3d81092..a2b956e 100644
--- a/README
+++ b/README
@@ -2489,6 +2489,11 @@ CBFS (Coreboot Filesystem) support
 		Define this option to include a destructive SPI flash
 		test ('sf test').
 
+		CONFIG_SPI_FLASH_BAR		Ban/Extended Addr Reg
+
+		Define this option to use the Bank addr/Extended addr
+		support on SPI flashes which has size > 16Mbytes.
+
 - SystemACE Support:
 		CONFIG_SYSTEMACE
 
diff --git a/drivers/mtd/spi/spi_flash.c b/drivers/mtd/spi/spi_flash.c
index 40c0389..ee959fc 100644
--- a/drivers/mtd/spi/spi_flash.c
+++ b/drivers/mtd/spi/spi_flash.c
@@ -74,7 +74,7 @@ int spi_flash_cmd_write_multi(struct spi_flash *flash, u32 offset,
 	unsigned long page_addr, byte_addr, page_size;
 	size_t chunk_len, actual;
 	int ret;
-	u8 cmd[4], bank_sel;
+	u8 cmd[4];
 
 	page_size = flash->page_size;
 
@@ -86,6 +86,9 @@ int spi_flash_cmd_write_multi(struct spi_flash *flash, u32 offset,
 
 	cmd[0] = CMD_PAGE_PROGRAM;
 	for (actual = 0; actual < len; actual += chunk_len) {
+#ifdef CONFIG_SPI_FLASH_BAR
+		u8 bank_sel;
+
 		bank_sel = offset / SPI_FLASH_16MB_BOUN;
 
 		ret = spi_flash_cmd_bankaddr_write(flash, bank_sel);
@@ -93,7 +96,7 @@ int spi_flash_cmd_write_multi(struct spi_flash *flash, u32 offset,
 			debug("SF: fail to set bank%d\n", bank_sel);
 			return ret;
 		}
-
+#endif
 		page_addr = offset / page_size;
 		byte_addr = offset % page_size;
 		chunk_len = min(len - actual, page_size - byte_addr);
@@ -162,6 +165,7 @@ int spi_flash_cmd_read_fast(struct spi_flash *flash, u32 offset,
 	cmd[4] = 0x00;
 
 	while (len) {
+#ifdef CONFIG_SPI_FLASH_BAR
 		bank_sel = offset / SPI_FLASH_16MB_BOUN;
 
 		ret = spi_flash_cmd_bankaddr_write(flash, bank_sel);
@@ -169,7 +173,7 @@ int spi_flash_cmd_read_fast(struct spi_flash *flash, u32 offset,
 			debug("SF: fail to set bank%d\n", bank_sel);
 			return ret;
 		}
-
+#endif
 		remain_len = (SPI_FLASH_16MB_BOUN * (bank_sel + 1) - offset);
 		if (len < remain_len)
 			read_len = len;
@@ -240,7 +244,7 @@ int spi_flash_cmd_erase(struct spi_flash *flash, u32 offset, size_t len)
 {
 	u32 erase_size;
 	int ret;
-	u8 cmd[4], bank_sel;
+	u8 cmd[4];
 
 	erase_size = flash->sector_size;
 	if (offset % erase_size || len % erase_size) {
@@ -260,6 +264,9 @@ int spi_flash_cmd_erase(struct spi_flash *flash, u32 offset, size_t len)
 		cmd[0] = CMD_ERASE_64K;
 
 	while (len) {
+#ifdef CONFIG_SPI_FLASH_BAR
+		u8 bank_sel;
+
 		bank_sel = offset / SPI_FLASH_16MB_BOUN;
 
 		ret = spi_flash_cmd_bankaddr_write(flash, bank_sel);
@@ -267,7 +274,7 @@ int spi_flash_cmd_erase(struct spi_flash *flash, u32 offset, size_t len)
 			debug("SF: fail to set bank%d\n", bank_sel);
 			return ret;
 		}
-
+#endif
 		spi_flash_addr(offset, cmd);
 
 		debug("SF: erase %2x %2x %2x %2x (%x)\n", cmd[0], cmd[1],
@@ -321,6 +328,7 @@ int spi_flash_cmd_write_status(struct spi_flash *flash, u8 sr)
 	return 0;
 }
 
+#ifdef CONFIG_SPI_FLASH_BAR
 int spi_flash_cmd_bankaddr_write(struct spi_flash *flash, u8 bank_sel)
 {
 	u8 cmd, idcode0;
@@ -379,6 +387,7 @@ int spi_flash_cmd_bankaddr_read(struct spi_flash *flash, void *data)
 
 	return spi_flash_read_common(flash, &cmd, 1, data, 1);
 }
+#endif
 
 #ifdef CONFIG_OF_CONTROL
 int spi_flash_decode_fdt(const void *blob, struct spi_flash *flash)
@@ -481,7 +490,6 @@ struct spi_flash *spi_flash_probe(unsigned int bus, unsigned int cs,
 	struct spi_flash *flash = NULL;
 	int ret, i, shift;
 	u8 idcode[IDCODE_LEN], *idp;
-	u8 curr_bank = 0;
 
 	spi = spi_setup_slave(bus, cs, max_hz, spi_mode);
 	if (!spi) {
@@ -525,9 +533,20 @@ struct spi_flash *spi_flash_probe(unsigned int bus, unsigned int cs,
 		goto err_manufacturer_probe;
 	}
 
+#ifdef CONFIG_SPI_FLASH_BAR
+	u8 curr_bank;
+
 	/* store the manuf id, for performing specific flash ops */
 	flash->idcode0 = *idp;
 
+	/* read bankaddr, which bank the flash is operated currently */
+	if (spi_flash_cmd_bankaddr_read(flash, &curr_bank)) {
+		debug("SF: fail to read bank addr register\n");
+		goto err_manufacturer_probe;
+	}
+	flash->bank_curr = curr_bank;
+#endif
+
 #ifdef CONFIG_OF_CONTROL
 	if (spi_flash_decode_fdt(gd->fdt_blob, flash)) {
 		debug("SF: FDT decode error\n");
@@ -541,16 +560,6 @@ struct spi_flash *spi_flash_probe(unsigned int bus, unsigned int cs,
 		printf(", mapped at %p", flash->memory_map);
 	puts("\n");
 
-	if (flash->size > SPI_FLASH_16MB_BOUN) {
-		if (spi_flash_cmd_bankaddr_read(flash, &curr_bank)) {
-			debug("SF: fail to read bank addr register\n");
-			goto err_manufacturer_probe;
-		}
-		flash->bank_curr = curr_bank;
-	} else {
-		flash->bank_curr = curr_bank;
-	}
-
 	spi_release_bus(spi);
 
 	return flash;
diff --git a/drivers/mtd/spi/spi_flash_internal.h b/drivers/mtd/spi/spi_flash_internal.h
index 455dc02..12d49a8 100644
--- a/drivers/mtd/spi/spi_flash_internal.h
+++ b/drivers/mtd/spi/spi_flash_internal.h
@@ -12,8 +12,6 @@
 #define SPI_FLASH_PAGE_ERASE_TIMEOUT	(5 * CONFIG_SYS_HZ)
 #define SPI_FLASH_SECTOR_ERASE_TIMEOUT	(10 * CONFIG_SYS_HZ)
 
-#define SPI_FLASH_16MB_BOUN		0x1000000
-
 /* Common commands */
 #define CMD_READ_ID			0x9f
 
@@ -30,11 +28,15 @@
 #define CMD_ERASE_64K			0xd8
 #define CMD_ERASE_CHIP			0xc7
 
+#define SPI_FLASH_16MB_BOUN		0x1000000
+
 /* Bank addr acess commands */
-#define CMD_BANKADDR_BRWR		0x17
-#define CMD_BANKADDR_BRRD		0x16
-#define CMD_EXTNADDR_WREAR		0xC5
-#define CMD_EXTNADDR_RDEAR		0xC8
+#ifdef CONFIG_SPI_FLASH_BAR
+# define CMD_BANKADDR_BRWR		0x17
+# define CMD_BANKADDR_BRRD		0x16
+# define CMD_EXTNADDR_WREAR		0xC5
+# define CMD_EXTNADDR_RDEAR		0xC8
+#endif
 
 /* Common status */
 #define STATUS_WIP			0x01
diff --git a/include/spi_flash.h b/include/spi_flash.h
index acac17a..5de50c2 100644
--- a/include/spi_flash.h
+++ b/include/spi_flash.h
@@ -38,11 +38,12 @@ struct spi_flash {
 	u32		page_size;
 	/* Erase (sector) size */
 	u32		sector_size;
+#ifdef CONFIG_SPI_FLASH_BAR
 	/* ID code0 */
 	u8              idcode0;
 	/* Current flash bank */
 	u8		bank_curr;
-
+#endif
 	void *memory_map;	/* Address of read-only SPI flash access */
 	int		(*read)(struct spi_flash *flash, u32 offset,
 				size_t len, void *buf);
-- 
1.8.3




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