[U-Boot] [PATCH v3 00/17] sf: Update sf framework to support all sizes of flashes

[Simon Glass]

Hi Jagan,

On Tue, Jun 11, 2013 at 12:23 PM, Jagannadha Sutradharudu Teki <
jagannadha.sutradharudu-teki at xilinx.com> wrote:

> This series is v3 for the patch series sent few weeks back with a head
> "sf: Update sf framework to support all sizes of flashes"
>
> All patch are looks same for v2 and v3 but placed the bank addr code
> on CONFIG_SPI_FLASH_BAR to reduce the sizes.
>
> The current implementation in sf supports 3-byte address mode due
> to this up to 16MB amount of flash is able to access for those
> flashes which has an actual size of > 16MB.
>
> This series of patches is more detailed/meatured changes w.r.t the current
> sf framework in addition to changes related to support all sizes using
> bank/exnt register addr accessing support.
>
> With these new updates on sf framework, the flashes which has < 16MB
> are not effected as per as performance is concern and but the
> u-boot.bin size incrased ~600 bytes.
>
> sf update(for first 16MBytes), Changes before:
> U-Boot> sf update 0x1000000 0x0 0x1000000
> - N25Q256
>   16777216 bytes written, 0 bytes skipped in 199.72s, speed 86480 B/s
> - W25Q128BV
>   16777216 bytes written, 0 bytes skipped in 351.739s, speed 48913 B/s
> - S25FL256S_64K
>   16777216 bytes written, 0 bytes skipped in 65.659s, speed 262144 B/s
>
> sf update(for first 16MBytes), Changes after:
> U-Boot> sf update 0x1000000 0x0 0x1000000
> - N25Q256
>   16777216 bytes written, 0 bytes skipped in 198.953s, speed 86480 B/s
> - W25Q128BV
>   16777216 bytes written, 0 bytes skipped in 350.90s, speed 49200 B/s
> - S25FL256S_64K
>   16777216 bytes written, 0 bytes skipped in 66.521s, speed 262144 B/s
>
> The main aim of these changes is to not effect the current framework
> and at the same time to support the > 16Mbyte flashes, becuase of this
> I involved few flash vendor people in CC [thought that they may/mayn't
> be a mailing list members] to know their views.
>
> REQUEST FOR ALL SPI CODE CONTRIBUTORS/USERS, PLEASE TEST
> THESE CHANGES W.R.T YOUR HW IF POSSIBLE.
>

Well the code size looks good - lots of changes within the series:

./tools/buildman/buildman -b try-spi2 smdk5250 -Ss
Summary of 18 commits for 2 boards (2 threads, 16 jobs per thread)
01: cmd_sf: Add print mesgs on sf read/write commands
02: sf: Add bank address register writing support
       arm: (for 2/2 boards)  all +202.0  bss -4.0  rodata +38.0  text
+168.0
03: sf: Add bank address register reading support
       arm: (for 2/2 boards)  all +133.0  bss +16.0  rodata +37.0  text
+80.0
04: sf: Add extended addr write support for winbond|stmicro
       arm: (for 2/2 boards)  bss -8.0  text +8.0
05: sf: Add extended addr read support for winbond|stmicro
       arm: (for 2/2 boards)  bss -24.0  text +24.0
06: sf: read flash bank addr register at probe time
       arm: (for 2/2 boards)  all +128.0  bss +48.0  text +80.0
07: sf: Update sf to support all sizes of flashes
       arm: (for 2/2 boards)  bss -32.0  text +32.0
08: sf: Update sf read to support all sizes of flashes
       arm: (for 2/2 boards)  all +128.0  bss +32.0  text +96.0
09: sf: Add bank addr code in CONFIG_SPI_FLASH_BAR
       arm: +   snow smdk5250
       arm: (for 2/2 boards)  all -527.0  bss -28.0  rodata -75.0  text
-424.0
10: sf: Initialize bank_sel to zero for read ops
       arm:    snow smdk5250
       arm: (for 2/2 boards)  bss +8.0  text -8.0
11: sf: Use spi_flash_addr() in write call
       arm: (for 2/2 boards)  bss +24.0  text -24.0
12: sf: stmicro: Add support for N25Q512
13: sf: stmicro: Add support for N25Q512A
14: sf: stmicro: Add support for N25Q1024
15: sf: stmicro: Add support for N25Q1024A
16: sf: spansion: Add support for S25FL512S_64K
17: sf: Remove spi_flash_cmd_poll_bit()
       arm: (for 2/2 boards)  all -64.0  bss -48.0  text -16.0
18: sf: Add Flag status register polling support

but no change overall:

./tools/buildman/buildman -b try-spi2 smdk5250 -Ss --step 0
Summary of 2 commits for 2 boards (2 threads, 16 jobs per thread)
01: cmd_sf: Add print mesgs on sf read/write commands
18: sf: Add Flag status register polling support
       arm: (for 2/2 boards)  bss -16.0  text +16.0



>
> Please let me know for any issues/concerns/questions.
>
> Jagannadha Sutradharudu Teki (17):
>   sf: Add bank address register writing support
>   sf: Add bank address register reading support
>   sf: Add extended addr write support for winbond|stmicro
>   sf: Add extended addr read support for winbond|stmicro
>   sf: read flash bank addr register at probe time
>   sf: Update sf to support all sizes of flashes
>   sf: Update sf read to support all sizes of flashes
>   sf: Add bank addr code in CONFIG_SPI_FLASH_BAR
>   sf: Initialize bank_sel to zero for read ops
>   sf: Use spi_flash_addr() in write call
>   sf: stmicro: Add support for N25Q512
>   sf: stmicro: Add support for N25Q512A
>   sf: stmicro: Add support for N25Q1024
>   sf: stmicro: Add support for N25Q1024A
>   sf: spansion: Add support for S25FL512S_64K
>   sf: Remove spi_flash_cmd_poll_bit()
>   sf: Add Flag status register polling support
>
>  README                               |   5 +
>  drivers/mtd/spi/spansion.c           |   7 ++
>  drivers/mtd/spi/spi_flash.c          | 185
> +++++++++++++++++++++++++++++------
>  drivers/mtd/spi/spi_flash_internal.h |  21 +++-
>  drivers/mtd/spi/stmicro.c            |  24 +++++
>  include/spi_flash.h                  |   7 +-
>  6 files changed, 215 insertions(+), 34 deletions(-)
>
> --
> 1.8.3
>
>
>
Regards,
Simon