[U-Boot] [PATCH 02/10 v5] powerpc/mpc85xx: modify the functionality clear_bss and aligning the end address of the BSS

ying.zhang at freescale.com ying.zhang at freescale.com
Thu Jun 20 10:04:20 CEST 2013


From: Ying Zhang <b40530 at freescale.com>

There will clear the BSS in the function clear_bss(), the reset address of
the BSS started from the __bss_start, and increased by four-byte increments,
finally stoped depending on the address is equal to the _bss_end. If the end
address __bss_end is not alignment to 4byte, it will be an infinite loop.

1. The reset action stoped depending on the reset address is greater
than or equal the end address of the BSS.
2. The end address of the BSS should be 4byte aligned. Because the reset unit
is 4 Bytes.

This patch is on top of the patch "powerpc/mpc85xx: support application
without resetvec segment in the linker script".

Signed-off-by: Ying Zhang <b40530 at freescale.com>
---
Compared with the original version, Changed as below:
1. Split from "boot from SD card/SPI flash with SPL".
2. Modified the function clear_bss().
3. Add explicit alignment of the BSS start address.
4. No change.

 arch/powerpc/cpu/mpc85xx/start.S        |    2 +-
 arch/powerpc/cpu/mpc85xx/u-boot-spl.lds |    2 ++
 2 files changed, 3 insertions(+), 1 deletions(-)

diff --git a/arch/powerpc/cpu/mpc85xx/start.S b/arch/powerpc/cpu/mpc85xx/start.S
index 4f0480b..2657982 100644
--- a/arch/powerpc/cpu/mpc85xx/start.S
+++ b/arch/powerpc/cpu/mpc85xx/start.S
@@ -1795,7 +1795,7 @@ clear_bss:
 	stw	r0,0(r3)
 	addi	r3,r3,4
 	cmplw	0,r3,r4
-	bne	5b
+	blt	5b
 6:
 
 	mr	r3,r9		/* Init Data pointer		*/
diff --git a/arch/powerpc/cpu/mpc85xx/u-boot-spl.lds b/arch/powerpc/cpu/mpc85xx/u-boot-spl.lds
index c613e58..5c7c598 100644
--- a/arch/powerpc/cpu/mpc85xx/u-boot-spl.lds
+++ b/arch/powerpc/cpu/mpc85xx/u-boot-spl.lds
@@ -89,10 +89,12 @@ SECTIONS
 	 */
 	. |= 0x10;
 
+	. = ALIGN(4);
 	__bss_start = .;
 	.bss : {
 		*(.sbss*)
 		*(.bss*)
 	}
+	. = ALIGN(4);
 	__bss_end = .;
 }
-- 
1.7.0.4




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