[U-Boot] [PATCH 07/11] powerpc/mpc8xxx: Set inactive csn_bnds to 0xffffffff

York Sun yorksun at freescale.com
Tue Jun 25 20:37:45 CEST 2013


When chip select interleaving is enabled, cs0_bnds is used for address
binding. Other csn_bnds are not used. When two controllers interleaving is
enabled, cs0_bnds of both controllers are used, other csn_bnds are not.
However, the unused csn_bnds may be used internally for calculating
addresses for calibration. Setting those registers to 0 may confuse
controllers in some cases. Instead, setting them to 0xffffffff together
with normal LAWs will guarantee the address is not mapped to DDR.

Signed-off-by: York Sun <yorksun at freescale.com>
---
 arch/powerpc/cpu/mpc8xxx/ddr/ctrl_regs.c |    4 ++--
 arch/powerpc/cpu/mpc8xxx/ddr/main.c      |    8 +++++++-
 2 files changed, 9 insertions(+), 3 deletions(-)

diff --git a/arch/powerpc/cpu/mpc8xxx/ddr/ctrl_regs.c b/arch/powerpc/cpu/mpc8xxx/ddr/ctrl_regs.c
index 8c95cad..a6f8d95 100644
--- a/arch/powerpc/cpu/mpc8xxx/ddr/ctrl_regs.c
+++ b/arch/powerpc/cpu/mpc8xxx/ddr/ctrl_regs.c
@@ -1588,8 +1588,8 @@ compute_fsl_memctl_config_regs(const memctl_options_t *popts,
 				| ((ea & 0xFFF) << 0)	/* ending address MSB */
 				);
 		} else {
-			debug("FSLDDR: setting bnds to 0 for inactive CS\n");
-			ddr->cs[i].bnds = 0;
+			/* setting bnds to 0xffffffff for inactive CS */
+			ddr->cs[i].bnds = 0xffffffff;
 		}
 
 		debug("FSLDDR: cs[%d]_bnds = 0x%08x\n", i, ddr->cs[i].bnds);
diff --git a/arch/powerpc/cpu/mpc8xxx/ddr/main.c b/arch/powerpc/cpu/mpc8xxx/ddr/main.c
index 7a8636d..c35405d 100644
--- a/arch/powerpc/cpu/mpc8xxx/ddr/main.c
+++ b/arch/powerpc/cpu/mpc8xxx/ddr/main.c
@@ -504,7 +504,13 @@ fsl_ddr_compute(fsl_ddr_info_t *pinfo, unsigned int start_step,
 				fsl_ddr_cfg_regs_t *reg = &ddr_reg[i];
 				if (reg->cs[j].config & 0x80000000) {
 					unsigned int end;
-					end = reg->cs[j].bnds & 0xFFF;
+					/*
+					 * 0xfffffff is a special value we put
+					 * for unused bnds
+					 */
+					if (reg->cs[j].bnds == 0xffffffff)
+						continue;
+					end = reg->cs[j].bnds & 0xffff;
 					if (end > max_end) {
 						max_end = end;
 					}
-- 
1.7.9.5




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