[U-Boot] [U-Boot,V3] ARM: OMAP5: DDR3: Change io settings

[Tom Rini]

On Thu, Oct 17, 2013 at 04:35:38PM +0530, SRICHARAN R wrote:

> The change from 0x64656465 to 0x64646464 is to remove the weak pull
> enabled on DQS, nDQS lines. This pulls the differential signals in the
> same direction which is not intended. So disabling the weak pulls improves
> signal integrity.
> 
> On the uEVM there are 4 DDR3 devices.  The VREF for 2 of the devices is powered by
> the OMAP's VREF_CA_OUT pins.  The VREF on the other 2 devices is powered by the OMAP's
> VREF_DQ_OUT pins.  So the net effect here is that only half of the DDR3 devices were being
> supplied a VREF!  This was clearly a mistake.  The second change improves the robustness of
> the interface and was specifically seen to cure corruption observed at high temperatures
> on some boards.
> 
> With the above two changes better memory stability was observed with extended
> temperature ranges around 100C.
> 
> Signed-off-by: Sricharan R <r.sricharan at ti.com>

Applied to u-boot-ti/master, thanks!

-- 
Tom
-------------- next part --------------
A non-text attachment was scrubbed...
Name: not available
Type: application/pgp-signature
Size: 836 bytes
Desc: Digital signature
URL: <http://lists.denx.de/pipermail/u-boot/attachments/20131104/4436ce5a/attachment.pgp>