[U-Boot] [PATCH 2/4] mx6: add structs for mmdc and ddr iomux registers

[Eric Nelson]

Hi Edward,

On 11/08/2013 02:35 AM, Edward Lin wrote:
> Signed-off-by: Edward Lin <edward.lin at technexion.com>
> ---
>   arch/arm/include/asm/arch-mx6/mx6_ddr_regs.h | 167
> +++++++++++++++++++++++++++
>   1 file changed, 167 insertions(+)
>   create mode 100644 arch/arm/include/asm/arch-mx6/mx6_ddr_regs.h
>
> diff --git a/arch/arm/include/asm/arch-mx6/mx6_ddr_regs.h
> b/arch/arm/include/asm/arch-mx6/mx6_ddr_regs.h
> new file mode 100644
> index 0000000..dd5e892
> --- /dev/null
> +++ b/arch/arm/include/asm/arch-mx6/mx6_ddr_regs.h
> @@ -0,0 +1,167 @@
> +/*
> + * Copyright (C) 2013 TechNexion Inc.
> + *
> + * Author: Edward Lin <edward.lin at technexion.com>
> + *
> + * SPDX-License-Identifier:    GPL-2.0+
> + */
> +#ifndef __ASM_ARCH_MX6_DDR_REGS_H__
> +#define __ASM_ARCH_MX6_DDR_REGS_H__
> +
> +#define MX6_MMDC_P0_BASE       0x021b0000
> +#define MX6_MMDC_P1_BASE       0x021b4000
> +

These are already declared in
	arch/arm/include/asm/arch-mx6/imx-regs.h

> +/* MMDC P0/P1 Registers */
> +struct mmdc_p_regs {
> +       u32 mdctl;
> +       u32 mdpdc;
> +       u32 mdotc;
> +       u32 mdcfg0;
> +       u32 mdcfg1;
> +       u32 mdcfg2;
> +       u32 mdmisc;
> +       u32 mdscr;
> +       u32 mdref;
> +       u32 res1[2];
> +       u32 mdrwd;
> +       u32 mdor;

Up to this point, this appears to be a mirror of
struct esd_mmdc_regs from arch/arm/imx-common/cpu.c

> +       u32 res2[3];
> +       u32 mdasp;
> +       u32 res3[240];
> +       u32 mapsr;
> +       u32 res4[254];
> +       u32 mpzqhwctrl;
> +       u32 res5[2];
> +       u32 mpwldectrl0;
> +       u32 mpwldectrl1;
> +       u32 res6;
> +       u32 mpodtctrl;
> +       u32 mprddqby0dl;
> +       u32 mprddqby1dl;
> +       u32 mprddqby2dl;
> +       u32 mprddqby3dl;
> +       u32 res7[4];
> +       u32 mpdgctrl0;
> +       u32 mpdgctrl1;
> +       u32 res8;
> +       u32 mprddlctl;
> +       u32 res9;
> +       u32 mpwrdlctl;
> +       u32 res10[25];
> +       u32 mpmur0;
> +}__attribute__((packed, aligned(4)));
> +

I'm not sure where you're headed with these...

It seems arbitrary to treat these as structures,
and I'm guessing that you're going to want tables
of values as is currently done in the DCD and
declared in mx6q-ddr.h/mx6dl-ddr.h.

> +#define MX6Q_IOM_DDR_BASE      0x020e0500
> +struct mx6q_iomux_ddr_regs {
> +       u32 res1[3];
> +       u32 dram_sdqs5;
> +       u32 dram_dqm5;
> +       u32 dram_dqm4;
> +       u32 dram_sdqs4;
> +       u32 dram_sdqs3;
> +       u32 dram_dqm3;
> +       u32 dram_sdqs2;
> +       u32 dram_dqm2;
> +       u32 res2[16];
> +       u32 dram_cas;

...

Regards,


Eric