[U-Boot] [[PATCH v2]pandaboard: 1/1] Modification of Elpida DDR2 RAM for Pandaboard-ES Rev B3

[Tom Rini]

-----BEGIN PGP SIGNED MESSAGE-----
Hash: SHA1

On 11/14/2013 11:28 AM, Michael Trimarchi wrote:
> Hi
> 
> On Thu, Nov 14, 2013 at 5:19 PM, Tom Rini <trini at ti.com> wrote:
> On 11/14/2013 05:06 AM, Hardik wrote:
>>>> From: Hardik Patel <hardik.patel at volansystech.com>
>>>>
>>>> Signed-off-by: Hardik Patel <hardik.patel at volansystech.com>
>>>> ---
>>>>  arch/arm/cpu/armv7/omap4/sdram_elpida.c |    2 +-
>>>>  board/ti/panda/panda.c                  |   24 ++++++++++++++++++++++++
>>>>  2 files changed, 25 insertions(+), 1 deletion(-)
>>>>
>>>> diff --git a/arch/arm/cpu/armv7/omap4/sdram_elpida.c b/arch/arm/cpu/armv7/omap4/sdram_elpida.c
>>>> index e4c8316..9fbdeea 100644
>>>> --- a/arch/arm/cpu/armv7/omap4/sdram_elpida.c
>>>> +++ b/arch/arm/cpu/armv7/omap4/sdram_elpida.c
>>>> @@ -123,7 +123,7 @@ static void emif_get_reg_dump_sdp(u32 emif_nr, const struct emif_regs **regs)
>>>>               *regs = &emif_regs_elpida_200_mhz_2cs;
>>>>       else if (omap4_rev == OMAP4430_ES2_3)
>>>>               *regs = &emif_regs_elpida_400_mhz_1cs;
>>>> -     else if (omap4_rev < OMAP4470_ES1_0)
>>>> +     else if (omap4_rev < OMAP4470_ES1_0 && !is_panda_es_rev_b3())
>>>>               *regs = &emif_regs_elpida_400_mhz_2cs;
>>>>       else
>>>>               *regs = &emif_regs_elpida_400_mhz_1cs;
>>>> diff --git a/board/ti/panda/panda.c b/board/ti/panda/panda.c
>>>> index c104024..5a7f80a 100644
>>>> --- a/board/ti/panda/panda.c
>>>> +++ b/board/ti/panda/panda.c
>>>> @@ -122,6 +122,30 @@ int get_board_revision(void)
>>>>       return board_id;
>>>>  }
>>>>
>>>> +/*
>>>> +* Routine: is_panda_es_rev_b3
>>>> +* Description: Detect if we are running on B3 version of ES panda board,
>>>> +*              This can be done by reading the level of GPIO 171
>>>> +*              and checking the processor revisions.
>>>> +*              GPIO171: 1 => Panda ES Rev B3
>>>> +*/
>>>> +u8 is_panda_es_rev_b3(void)
>>>> +{
>>>> +        int processor_rev = omap_revision();
>>>> +        int ret = 0;
>>>> +
>>>> +        if ((processor_rev >= OMAP4460_ES1_0 &&
>>>> +             processor_rev <= OMAP4460_ES1_1)) {
>>>> +
>>>> +                /* Setup the mux for the common board ID pins (gpio 171) */
>>>> +                writew((IEN | M3), (*ctrl)->control_padconf_core_base + UNIPRO_TX0);
>>>> +
>>>> +                /* if processor_rev is panda ES and GPIO171 is 1, it is rev b3 */
>>>> +                ret = gpio_get_value(PANDA_BOARD_ID_2_GPIO);
>>>> +        }
>>>> +        return ret;
>>>> +}
>>>> +
>>>>  /**
>>>>   * @brief misc_init_r - Configure Panda board specific configurations
>>>>   * such as power configurations, ethernet initialization as phase2 of
> 
> This isn't right.  What I was saying is that board/ti/panda/panda.c
> needs to provide its own emif_get_reg_dump function, which will (as
> designed) override the current one from
> arch/arm/cpu/armv7/omap4/sdram_elpida.c
> 
> 
>> Any problem to have visibility of emif_regs array of lpddr?

Things that need exposing so that we can do what was intended before
should be exposed, in <asm/arch-omap4/sys_proto.h> I think.

- -- 
Tom
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.11 (GNU/Linux)
Comment: Using GnuPG with Thunderbird - http://www.enigmail.net/

iQIcBAEBAgAGBQJShPszAAoJENk4IS6UOR1W2TMP/RzK77vL75h5HYP23RKP/CWx
i7A/xbStKYT8ozh2s1IyHsKohVmnFmIh6lIa4cTYMzrqQBIJxnw9NB1p73qRFPFS
M8Bwx0QS3IU9Wqybk2w1x26Ymm65NWcAQ9SvPh4EBCpdnu1JnJoaceekw1fp55Pb
B+H/44Xr5D57F4R0DAuLqT2Kc6uoMf69X6I/DU7CuxhcceoMAMaFrZq+WrLAqIeY
M5qsCTsyOIQdzV4pheR9gH7F6dbzlA9uee2lshIP0yN5JJmWkZc1CjMR0SsStSpy
RKFJuNOgv32v7CGwvyA/HAk6KdKy5VSWUhHT/+1B3fMzIZhxypOlL90Vbz2Zlh5N
J5E5RNWsQaBJnVaEpo/4wWOTWmq/L5+lQLyJVPUkZFGocHgRBT8gqkcREe/+mSKx
DaxX4mLNlCvooMrNSakPPZHtPHXnVieMAvhdKDDdhLRKHAST+1hZD/ztBD63bwcJ
eSvGBe6SDv/K/mScU9eeNtJzVYs6O1VZm9sqgJBPhgUTN/Mfv7NbZVF3m4rMpkeB
PbQ/eSzxERBxeiInrPh2Ns62oDxCXTodOw5qy+jUQ72WPI/3zMNRHaBbyXTNn9nZ
NAj4XSex3tiQUpJYw21wbshEuCz4/Lo5LBWXeksdg0bfSxWX9jG/mpkOE6NACSyE
7TeL/tTeum0zVByyfhjG
=ZmUi
-----END PGP SIGNATURE-----