[U-Boot] [PATCH][v3] powerpc: spiflash:Add corenet devices support in eSPI SPL

[Priyanka Jain]

Existing eSPI SPL framework assumes booting from spi-image
with boot_format header which contains final u-boot Image
offset and size. No such header is present in case of
corenet devices like T1040 as corenet deivces use PBI-RCW
based intialization.

So, for corenet deives, SPL bootloader use values provided
at compilation time. These values can be defined in board
specific config file.

Signed-off-by: Priyanka Jain <Priyanka.Jain at freescale.com>
---
Changes for v3:
	Send as independent patch (not as part of patch set)

Changes for v2:
	Updated description based on Sun York's inputs

 drivers/mtd/spi/fsl_espi_spl.c |    5 +++++
 1 files changed, 5 insertions(+), 0 deletions(-)

diff --git a/drivers/mtd/spi/fsl_espi_spl.c b/drivers/mtd/spi/fsl_espi_spl.c
index 6263d8c..e5ac79b 100644
--- a/drivers/mtd/spi/fsl_espi_spl.c
+++ b/drivers/mtd/spi/fsl_espi_spl.c
@@ -31,6 +31,10 @@ void spi_boot(void)
 		hang();
 	}
 
+#ifdef CONFIG_FSL_CORENET
+	offset = CONFIG_SYS_SPI_FLASH_U_BOOT_OFFS;
+	code_len = CONFIG_SYS_SPI_FLASH_U_BOOT_SIZE;
+#else
 	/*
 	* Load U-Boot image from SPI flash into RAM
 	*/
@@ -50,6 +54,7 @@ void spi_boot(void)
 	code_len = *(u32 *)(buf + ESPI_BOOT_IMAGE_SIZE);
 	/* Skip spl code */
 	code_len = code_len - CONFIG_SPL_MAX_SIZE;
+#endif
 	/* copy code to DDR */
 	spi_flash_read(flash, offset, code_len,
 		       (void *)CONFIG_SYS_SPI_FLASH_U_BOOT_DST);
-- 
1.7.4.1