[U-Boot] Nand ECC layout

[Yegor Yefremov]

I'm testing a board, that is quite similar with am3517evm. In Linux I
just want to use one ECC layout for all images (MLO. u-boot.img,
uImage, rootfs). It seems the only choice is
OMAP_ECC_HAMMING_CODE_HW_ROMCODE. My flash chip has page size of 2048
+ 64 bytes and 128K erase pages. It would correspond to u-boot's

#ifdef GPMC_NAND_ECC_LP_x8_LAYOUT
#define GPMC_NAND_HW_ECC_LAYOUT {\
        .eccbytes = 12,\
        .eccpos = {1, 2, 3, 4, 5, 6, 7, 8,\
                9, 10, 11, 12},\
        .oobfree = {\
                {.offset = 13,\
                 .length = 51 } } \
}
#endif

in drivers/mtd/nand/omap_gpmc.c ECC layout will be configured as follows:

        nand->ecc.mode = NAND_ECC_HW;
        nand->ecc.layout = &hw_nand_oob;
        nand->ecc.size = CONFIG_SYS_NAND_ECCSIZE;
        nand->ecc.bytes = CONFIG_SYS_NAND_ECCBYTES;

so ecc.bytes will be configured twice: once in ecc.layout structure
and then in ecc.bytes via CONFIG_SYS_NAND_ECCBYTES. But if I try to
set CONFIG_SYS_NAND_ECCBYTES to 12 in am3517_evm.h, the SPL hangs. And
after u-boot starts I can switch ECC via nandecc. In this case
ecc.bytes will be hardcoded to 3. Is layout structure not sufficient
for ECC layout definition? Or am I missing something?

How can I force SPL/U-Boot to use OMAP_ECC_HAMMING_CODE_HW_ROMCODE as
described above?

U-Boot version: master branch, commit
c2e5e802ecb7ab668ce9911b210ed68c804b349f (Merge branch 'master' of
git://git.denx.de/u-boot-mips)  Sun Nov 17 14:11:34 2013

Best regards,
Yegor