[U-Boot] [PATCH 1/1] am33xx: add CONFIG_SYS_NAND_DEVICE_WIDTH to determine NAND device bus-width

Gupta, Pekon pekon at ti.com
Tue Oct 1 12:26:39 CEST 2013


Hi Mark,

> From: Mark Jackson [mailto:mpfj-list at newflow.co.uk]
> To: Gupta, Pekon; scottwood at freescale.com; Rini, Tom
> 
> 
> <snip>
> 
> > diff --git a/include/configs/am335x_evm.h
> b/include/configs/am335x_evm.h
> > index 978bca7..c92cb2f 100644
> > --- a/include/configs/am335x_evm.h
> > +++ b/include/configs/am335x_evm.h
> > @@ -216,6 +216,7 @@
> >
> >  #ifdef CONFIG_NAND
> >  #define CONFIG_SYS_NAND_5_ADDR_CYCLE
> > +#define CONFIG_SYS_NAND_DEVICE_WIDTH	8
> 
> This new setting ...
> 
> >  #define CONFIG_SYS_NAND_BLOCK_SIZE	131072
> >  #define CONFIG_SYS_NAND_PAGE_SIZE	2048
> >  #define CONFIG_SYS_NAND_OOBSIZE		64
> > @@ -366,7 +367,6 @@
> >  /* NAND support */
> >  #ifdef CONFIG_NAND
> >  #define CONFIG_CMD_NAND
> > -#define GPMC_NAND_ECC_LP_x16_LAYOUT	1
> 
> ... does *not* match with what you're taking out here !!
> 
This CONFIG was used to define the layout based on
(1) large-page of small-page NAND, and
(2) BADBLOCK_MARKER position based on x16 or x8 device.

Now this define is no more used, as ecc.layout is configured
based on ecc-scheme. Please refer following patch.
http://lists.denx.de/pipermail/u-boot/2013-September/163867.html

Yes, I can put these into independent patch sets.
However, if you can please test these patches on your system,
This would at-least confirm whether these changes work,
then I can re-send this series, with other comments.

*Patch Series to test*
http://lists.denx.de/pipermail/u-boot/2013-September/163865.html

http://lists.denx.de/pipermail/u-boot/2013-September/163878.html


with regards, pekon


> >  #if !defined(CONFIG_SPI_BOOT) && !defined(CONFIG_NOR_BOOT)
> >  #define MTDIDS_DEFAULT			"nand0=omap2-nand.0"
> >  #define MTDPARTS_DEFAULT		"mtdparts=omap2-
> nand.0:128k(SPL)," \
> > diff --git a/include/configs/am3517_crane.h
> b/include/configs/am3517_crane.h
> > index 1fd2508..0985221 100644
> > --- a/include/configs/am3517_crane.h
> > +++ b/include/configs/am3517_crane.h
> > @@ -269,7 +269,6 @@
> >  #define CONFIG_SYS_MONITOR_BASE
> 	CONFIG_SYS_FLASH_BASE
> >
> >  #define CONFIG_NAND_OMAP_GPMC
> > -#define GPMC_NAND_ECC_LP_x16_LAYOUT	1
> 
> Same here ...
> 
> >  #define CONFIG_ENV_IS_IN_NAND		1
> >  #define SMNAND_ENV_OFFSET		0x260000 /* environment
> starts here */
> >
> > @@ -332,6 +331,7 @@
> >
> >  /* NAND boot config */
> >  #define CONFIG_SYS_NAND_5_ADDR_CYCLE
> > +#define CONFIG_SYS_NAND_DEVICE_WIDTH	8
> 
> ... !!
> 
> >  #define CONFIG_SYS_NAND_PAGE_COUNT	64
> >  #define CONFIG_SYS_NAND_PAGE_SIZE	2048
> >  #define CONFIG_SYS_NAND_OOBSIZE		64
> > diff --git a/include/configs/am3517_evm.h
> b/include/configs/am3517_evm.h
> > index 6500878..8593d44 100644
> > --- a/include/configs/am3517_evm.h
> > +++ b/include/configs/am3517_evm.h
> > @@ -263,7 +263,6 @@
> >  #define CONFIG_SYS_MONITOR_BASE
> 	CONFIG_SYS_FLASH_BASE
> >
> >  #define CONFIG_NAND_OMAP_GPMC
> > -#define GPMC_NAND_ECC_LP_x16_LAYOUT	1
> 
> Again ...
> 
> >  #define CONFIG_ENV_IS_IN_NAND		1
> >  #define SMNAND_ENV_OFFSET		0x260000 /* environment
> starts here */
> >
> > @@ -326,6 +325,7 @@
> >
> >  /* NAND boot config */
> >  #define CONFIG_SYS_NAND_5_ADDR_CYCLE
> > +#define CONFIG_SYS_NAND_DEVICE_WIDTH	8
> 
> ... !!
> 
> >  #define CONFIG_SYS_NAND_PAGE_COUNT	64
> >  #define CONFIG_SYS_NAND_PAGE_SIZE	2048
> >  #define CONFIG_SYS_NAND_OOBSIZE		64
> > diff --git a/include/configs/cm_t35.h b/include/configs/cm_t35.h
> > index bc5b66c..1e3dd0d 100644
> > --- a/include/configs/cm_t35.h
> > +++ b/include/configs/cm_t35.h
> > @@ -164,8 +164,6 @@
> >  #define CONFIG_SYS_NAND_BASE		NAND_BASE	/* physical
> address */
> >  							/* to access nand at
> */
> >  							/* CS0 */
> > -#define GPMC_NAND_ECC_LP_x8_LAYOUT
> > -
> 
> And here you don't specify the new setting at all.
> 
> >  #define CONFIG_SYS_MAX_NAND_DEVICE	1		/* Max
> number of NAND */
> >  							/* devices */
> >  /* Environment information */
> 
> <snip>
> 
> There's several other instances of the same issue through the whole patch.
> 
> Mark J.


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